Inventor · disambiguated record
Neeti Khullar Bhatnagar
Also filed as: BHATNAGAR NEETI · BHATNAGAR NEETI K · BHATNAGAR NEETI KHULLAR
14 granted patents·133 citations·filing 2000–2021
91Inventor score
Technology areasG06F
Files withCADENCE DESIGN SYSTEMS INC9CADENCE DESIGN SYSTEM INC1CHAO QIZHANG1LANG TUAY-LING KATHY1LARUE JR WILLIAM W1
Top patents by PatentIndex Score
14 records- 0188US10802852B1Method for interactive embedded software debugging through the control of simulation tracing componentsCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Oct 13, 2020·10 cites·25 claims
- 0288US9262305B1Simulation observability and control of all hardware and software components of a virtual platform model of an electronics systemCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted Feb 16, 2016·17 cites·18 claims
- 0386US9262299B1Simulation observability and control of all hardware and software components of a virtual platform model of an electronics systemCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted Feb 16, 2016·13 cites·20 claims
- 0484US11928045B1System and method for non-intrusive debugging at an embedded software breakpointCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Mar 12, 2024·3 cites·20 claims
- 0584US10650174B1System and method for visualizing event sequences for expressions using both hardware and software state informationCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted May 12, 2020·8 cites·20 claims
- 0683US8838430B1Detection of memory access violation in simulationsLANG TUAY-LING KATHY·Filed 2011·Granted Sep 16, 2014·20 cites·33 claims
- 0778US7069204B1Method and system for performance level modeling and simulation of electronic systems having both hardware and software elementsCADENCE DESIGN SYSTEM INC·Filed 2000·Granted Jun 27, 2006·44 cites·29 claims
- 0876US11487561B1Post simulation debug and analysis using a system memory modelCADENCE DESIGN SYSTEMS INC·Filed 2014·Granted Nov 1, 2022·5 cites·29 claims
- 0969US10339229B1Simulation observability and control of all hardware and software components of a virtual platform model of an electronics systemCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted Jul 2, 2019·3 cites·16 claims
- 1067US9690686B1Method for setting breakpoints in automatically loaded softwareCADENCE DESIGN SYSTEMS INC·Filed 2014·Granted Jun 27, 2017·2 cites·20 claims
- 1164US10176276B2Determining an optimal global quantum for an event-driven simulationCHAO QIZHANG·Filed 2012·Granted Jan 8, 2019·3 cites·24 claims
- 1258US8903696B2System and method for controlling granularity of transaction recording in discrete event simulationMOTEL VINCENT·Filed 2011·Granted Dec 2, 2014·2 cites·25 claims
- 1358US8296119B2Saving and restarting discrete event simulationsLARUE JR WILLIAM W·Filed 2007·Granted Oct 23, 2012·3 cites·19 claims
- 1442US7720665B1Method and system for realizing reset in discrete event simulationCADENCE DESIGN SYSTEMS INC·Filed 2006·Granted May 18, 2010·0 cites·16 claims
Join the waitlist — get patent alerts
Get an alert when Neeti Khullar Bhatnagar files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →