Inventor · disambiguated record
Paul Caprioli
Also filed as: CAPRIOLI PAUL · CHAUDHRY SHAILENDER
88 granted patents·17 pending applications·881 citations·filing 2002–2024
99Inventor score
Top patents by PatentIndex Score
105 records- 0197US11093277B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2020·Granted Aug 17, 2021·6 cites·25 claims
- 0297US7930695B2Method and apparatus for synchronizing threads on a processor that supports transactional memoryORACLE AMERICA INC·Filed 2006·Granted Apr 19, 2011·73 cites·21 claims
- 0397US7461208B1Circuitry and method for accessing an associative cache with parallel determination of data and data availabilitySUN MICROSYSTEMS INC·Filed 2005·Granted Dec 2, 2008·78 cites·20 claims
- 0496US11693691B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2021·Granted Jul 4, 2023·4 cites·11 claims
- 0596US8041900B2Method and apparatus for improving transactional memory commit latencyORACLE AMERICA INC·Filed 2008·Granted Oct 18, 2011·63 cites·20 claims
- 0696US7617421B2Method and apparatus for reporting failure conditions during transactional executionSUN MICROSYSTEMS INC·Filed 2006·Granted Nov 10, 2009·60 cites·18 claims
- 0795US8161273B2Method and apparatus for programmatically rewinding a register inside a transactionCAPRIOLI PAUL·Filed 2008·Granted Apr 17, 2012·54 cites·23 claims
- 0894US9477453B1Technologies for shadow stack manipulation for binary translation systemsINTEL CORP·Filed 2015·Granted Oct 25, 2016·18 cites·25 claims
- 0994US7480787B1Method and structure for pipelining of SIMD conditional movesSUN MICROSYSTEMS INC·Filed 2006·Granted Jan 20, 2009·39 cites·14 claims
- 1091US11416281B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2016·Granted Aug 16, 2022·4 cites·28 claims
- 1191US7584346B1Method and apparatus for supporting different modes of multi-threaded speculative executionSUN MICROSYSTEMS INC·Filed 2007·Granted Sep 1, 2009·25 cites·18 claims
- 1291US7509481B2Patchable and/or programmable pre-decodeSUN MICROSYSTEMS INC·Filed 2006·Granted Mar 24, 2009·26 cites·22 claims
- 1391US7293161B1Deferring loads and stores when a load buffer or store buffer fills during execute-ahead modeSUN MICROSYSTEMS INC·Filed 2005·Granted Nov 6, 2007·26 cites·18 claims
- 1490US12135981B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2023·Granted Nov 5, 2024·1 cites·20 claims
- 1590US7395418B1Using a transactional execution mechanism to free up processor resources used by a busy-waiting threadSUN MICROSYSTEMS INC·Filed 2005·Granted Jul 1, 2008·27 cites·15 claims
- 1689US10282182B2Technologies for translation cache management in binary translation systemsINTEL CORP·Filed 2016·Granted May 7, 2019·5 cites·23 claims
- 1789US9703948B2Return-target restrictive return from procedure instructions, processors, methods, and systemsINTEL CORP·Filed 2014·Granted Jul 11, 2017·12 cites·9 claims
- 1889US7571304B2Generation of multiple checkpoints in a processor that supports speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Aug 4, 2009·21 cites·16 claims
- 1988US7421465B1Arithmetic early bypassSUN MICROSYSTEMS INC·Filed 2004·Granted Sep 2, 2008·57 cites·50 claims
- 2086US7707359B2Method and apparatus for selectively prefetching based on resource availabilityORACLE AMERICA INC·Filed 2006·Granted Apr 27, 2010·18 cites·17 claims
- 2186US7257699B2Selective execution of deferred instructions in a processor that supports speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Aug 14, 2007·16 cites·21 claims
- 2285US10450091B2Package acceptance, guidance, and refuel system for drone technologyDroneTerminus LLC·Filed 2018·Granted Oct 22, 2019·9 cites·29 claims
- 2385US9417855B2Instruction and logic to perform dynamic binary translationKANHERE ABHAY S·Filed 2011·Granted Aug 16, 2016·11 cites·19 claims
- 2482US9330020B2System, apparatus, and method for transparent page level instruction translationCAPRIOLI PAUL·Filed 2013·Granted May 3, 2016·6 cites·16 claims
- 2582US2025123881A1Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2024·Application pending·0 cites
- 2681US8484434B2Index generation for cache memoriesCAPRIOLI PAUL·Filed 2012·Granted Jul 9, 2013·5 cites·22 claims
- 2780US10063569B2Custom protection against side channel attacksINTEL CORP·Filed 2015·Granted Aug 28, 2018·3 cites·22 claims
- 2880US7836290B2Return address stack recovery in a speculative execution computing apparatusORACLE AMERICA INC·Filed 2006·Granted Nov 16, 2010·10 cites·11 claims
- 2978US8732438B2Anti-prefetch instructionCAPRIOLI PAUL·Filed 2008·Granted May 20, 2014·9 cites·20 claims
- 3078US7689813B2Method and apparatus for enforcing membar instruction semantics in an execute-ahead processorSUN MICROSYSTEMS INC·Filed 2005·Granted Mar 30, 2010·9 cites·16 claims
- 3178US7293163B2Method and apparatus for dynamically adjusting the aggressiveness of an execute-ahead processor to hide memory latencySUN MICROSYSTEMS INC·Filed 2004·Granted Nov 6, 2007·25 cites·18 claims
- 3277US7353363B2Patchable and/or programmable decode using predecode selectionSUN MICROSYSTEMS INC·Filed 2006·Granted Apr 1, 2008·8 cites·16 claims
- 3377US7293160B2Mechanism for eliminating the restart penalty when reissuing deferred instructionsSUN MICROSYSTEMS INC·Filed 2005·Granted Nov 6, 2007·8 cites·20 claims
- 3476US8826257B2Memory disambiguation hardware to support software binary translationAL-OTOOM MUAWYA M·Filed 2012·Granted Sep 2, 2014·7 cites·18 claims
- 3575US9292294B2Detection of memory address aliasing and violations of data dependency relationshipsINTEL CORP·Filed 2012·Granted Mar 22, 2016·4 cites·21 claims
- 3675US8151084B2Using address and non-address information for improved index generation for cache memoriesCAPRIOLI PAUL·Filed 2008·Granted Apr 3, 2012·6 cites·22 claims
- 3775US7484080B2Entering scout-mode when stores encountered during execute-ahead mode exceed the capacity of the store bufferSUN MICROSYSTEMS INC·Filed 2005·Granted Jan 27, 2009·7 cites·19 claims
- 3874US10817291B2Apparatuses, methods, and systems for swizzle operations in a configurable spatial acceleratorINTEL CORP·Filed 2019·Granted Oct 27, 2020·2 cites·24 claims
- 3973US7590830B2Method and structure for concurrent branch prediction in a processorSUN MICROSYSTEMS INC·Filed 2005·Granted Sep 15, 2009·6 cites·48 claims
- 4071US9542191B2Hardware profiling mechanism to enable page level automatic binary translationCAPRIOLI PAUL·Filed 2012·Granted Jan 10, 2017·3 cites·20 claims
- 4171US7610474B2Mechanism for hardware tracking of return address after tail call elimination of return-type instructionSUN MICROSYSTEMS INC·Filed 2006·Granted Oct 27, 2009·5 cites·20 claims
- 4271US7509472B2Collapsible front-end translation for instruction fetchSUN MICROSYSTEMS INC·Filed 2006·Granted Mar 24, 2009·5 cites·11 claims
- 4371US7277989B2Selectively performing fetches for store operations during speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Oct 2, 2007·5 cites·20 claims
- 4469US9588766B2Accelerated interlane vector reduction instructionsINTEL CORP·Filed 2012·Granted Mar 7, 2017·2 cites·17 claims
- 4569US9032381B2State recovery methods and apparatus for computing platformsKANHERE ABHAY S·Filed 2012·Granted May 12, 2015·2 cites·22 claims
- 4669US7418581B2Method and apparatus for sampling instructions on a processor that supports speculative executionSUN MICROSYSTEMS INC·Filed 2006·Granted Aug 26, 2008·4 cites·17 claims
- 4768US9507575B2State recovery methods and apparatus for computing platformsINTEL CORP·Filed 2015·Granted Nov 29, 2016·1 cites·20 claims
- 4868US8364900B2Pseudo-LRU cache line replacement for a high-speed cacheORACLE AMERICA INC·Filed 2008·Granted Jan 29, 2013·4 cites·19 claims
- 4968US7610470B2Preventing register data flow hazards in an SST processorSUN MICROSYSTEMS INC·Filed 2007·Granted Oct 27, 2009·4 cites·16 claims
- 5067US10387324B2Method, apparatus, and system for efficiently handling multiple virtual address mappings during transactional execution canceling the transactional execution upon conflict between physical addresses of transactional accesses within the transactional executionCAPRIOLI PAUL·Filed 2011·Granted Aug 20, 2019·2 cites·22 claims
Showing the top 50 of 105 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →