Inventor · disambiguated record
Puay Gek Chua
Also filed as: CHUA PUAY G · CHUA PUAY GEK
2 granted patents·3 pending applications·9 citations·filing 2004–2011
52Inventor score
Files withCHUA PUAY GEK1HUANG YAOHUANG1JIN YONGGANG1ST ASSEMBLY TEST SERVICES LTD1STATS CHIPPAC LTD1
Top patents by PatentIndex Score
5 records- 0176US8535980B2Method for producing vias in fan-out wafers using dry film and conductive paste, and a corresponding semiconductor packageCHUA PUAY GEK·Filed 2010·Granted Sep 17, 2013·8 cites·19 claims
- 0239US7306133B2System for fabricating an integrated circuit package on a printed circuit boardST ASSEMBLY TEST SERVICES LTD·Filed 2004·Granted Dec 11, 2007·1 cites·10 claims
- 0335US2012282767A1Method for producing a two-sided fan-out wafer level package with electrically conductive interconnects, and a corresponding semiconductor packageJIN YONGGANG·Filed 2011·Application pending·0 cites
- 0434US2006160267A1Under bump metallurgy in integrated circuitsSTATS CHIPPAC LTD·Filed 2005·Application pending·0 cites
- 0531US2012161319A1Ball grid array method and structureHUANG YAOHUANG·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →