Inventor · disambiguated record
Rajshree Chabukswar
Also filed as: CHABUKSWAR RAJSHREE · CHABUKSWAR RAJSHREE A · CHABUKSWAR RAJSHREE ARUN
21 granted patents·16 pending applications·53 citations·filing 2014–2025
90Inventor score
Top patents by PatentIndex Score
37 records- 0193US9910475B2Processor core power event tracingINTEL CORP·Filed 2014·Granted Mar 6, 2018·47 cites·19 claims
- 0277US11422616B2System, apparatus and method for dynamically adjusting platform power and performance based on task characteristicsINTEL CORP·Filed 2020·Granted Aug 23, 2022·1 cites·20 claims
- 0375US12216932B2Precise longitudinal monitoring of memory operationsINTEL CORP·Filed 2023·Granted Feb 4, 2025·0 cites·12 claims
- 0475US12117886B2System, apparatus and method for dynamically adjusting platform power and performance based on task characteristicsINTEL CORP·Filed 2023·Granted Oct 15, 2024·0 cites·20 claims
- 0572US11775047B2System, apparatus and method for dynamically adjusting platform power and performance based on task characteristicsINTEL CORP·Filed 2022·Granted Oct 3, 2023·0 cites·20 claims
- 0669US11436118B2Apparatus and method for adaptively scheduling work on heterogeneous processing resourcesINTEL CORP·Filed 2019·Granted Sep 6, 2022·1 cites·27 claims
- 0769US9626274B2Instruction and logic for tracking access to monitored regionsYASIN AHMAD·Filed 2014·Granted Apr 18, 2017·3 cites·20 claims
- 0868US2023092268A1Branch type logging in last branch registersINTEL CORP·Filed 2022·Application pending·0 cites
- 0964US11693588B2Precise longitudinal monitoring of memory operationsINTEL CORP·Filed 2020·Granted Jul 4, 2023·0 cites·20 claims
- 1062US10445204B2Instruction and logic for interrupt and exception handlingINTEL CORP·Filed 2015·Granted Oct 15, 2019·1 cites·17 claims
- 1160US10649688B1Precise longitudinal monitoring of memory operationsINTEL CORP·Filed 2018·Granted May 12, 2020·0 cites·22 claims
- 1259US2020210178A1Branch type logging in last branch registersINTEL CORP·Filed 2020·Application pending·0 cites
- 1358US12416964B2Methods and apparatus for bi-directional control of computing unit frequencyINTEL CORP·Filed 2021·Granted Sep 16, 2025·0 cites·22 claims
- 1457US12008398B2Performance monitoring in heterogeneous systemsINTEL CORP·Filed 2019·Granted Jun 11, 2024·0 cites·19 claims
- 1556US2024264861A1Apparatus, method, and system for scheduling threads on a processorGUPTA Monica·Filed 2024·Application pending·0 cites
- 1655US2025036186A1Method and system for power management and scheduling based on human interface device input typeINTEL CORP·Filed 2024·Application pending·0 cites
- 1754US10656697B2Processor core power event tracingINTEL CORP·Filed 2018·Granted May 19, 2020·0 cites·20 claims
- 1854US10592244B2Branch type logging in last branch registersINTEL CORP·Filed 2017·Granted Mar 17, 2020·0 cites·18 claims
- 1953US12393427B2Core-based speculative page fault listINTEL CORP·Filed 2021·Granted Aug 19, 2025·0 cites·9 claims
- 2053US2025284521A1Methods and apparatus to dynamically configure delay durations and/or core power states in virtual computing environmentsINTEL CORP·Filed 2024·Application pending·0 cites
- 2152US11934249B2Methods and apparatus to manage energy usage and compute performanceINTEL CORP·Filed 2022·Granted Mar 19, 2024·0 cites·21 claims
- 2251US2024330050A1Method and apparatus to allow adjustment of the core availability mask provided to system softwareINTEL CORP·Filed 2023·Application pending·0 cites
- 2350US2024220446A1Methods, systems, and apparatuses for dynamic simultaneous multi-threading (smt) scheduling to maximize processor performance on hybrid platformsINTEL CORP·Filed 2022·Application pending·0 cites
- 2450US2024103914A1Dynamically adjusting thread affinitization using hardware-based core availability notificationsINTEL CORP·Filed 2022·Application pending·0 cites
- 2550US2025370824A1Apparatuses, systems, and methods for allocation and balancing of cpu resources in virtualized computing environmentsRAJENDRAN JAISHANKAR·Filed 2025·Application pending·0 cites
- 2649US2024330048A1Apparatus and method for dynamic core managementINTEL CORP·Filed 2023·Application pending·0 cites
- 2748US2025060808A1Processor system power and performance managementROTEM EFRAIM·Filed 2023·Application pending·0 cites
- 2846US2025004851A1System, method and apparatus for hardware-based core parking using workload telemetry informationINTEL CORP·Filed 2023·Application pending·0 cites
- 2945US12141015B2Hardware and software coordinated cost-aware low power state selectionINTEL CORP·Filed 2020·Granted Nov 12, 2024·0 cites·17 claims
- 3045US11593154B2Operating system assisted prioritized thread executionINTEL CORP·Filed 2018·Granted Feb 28, 2023·0 cites·24 claims
- 3143US2021294641A1Dynamic interrupt steering and processor unit idle state demotionINTEL CORP·Filed 2021·Application pending·0 cites
- 3241US12443453B2Autonomous and extensible resource control based on software priority hintINTEL CORP·Filed 2020·Granted Oct 14, 2025·0 cites·12 claims
- 3340US11093278B2Modifying processor frequency based on interrupt rateINTEL CORP·Filed 2017·Granted Aug 17, 2021·0 cites·19 claims
- 3439US2018314289A1Modifying an operating frequency in a processorINTEL CORP·Filed 2017·Application pending·0 cites
- 3538US2021304096A1Device, system and method to dynamically prioritize a data flow based on user interest in a taskINTEL CORP·Filed 2020·Application pending·0 cites
- 3636US11531563B2Technology for optimizing hybrid processor utilizationINTEL CORP·Filed 2020·Granted Dec 20, 2022·0 cites·21 claims
- 3736US2019041950A1System, Apparatus And Method For Data Driven Low Power State Control Based On Performance Monitoring InformationINTEL CORP·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →