Inventor · disambiguated record
Ramachandra Divakaruni
Also filed as: DIVAKARUNI RAMACHANDRA
251 granted patents·25 pending applications·4,870 citations·filing 1999–2022
99Inventor score
Files withIBM238GLOBALFOUNDRIES INC12CHENG KANGGUO6INFINEON TECHNOLOGIES CORP4INFINEON TECHNOLOGIES AG2
Top patents by PatentIndex Score
276 records- 0199US7470570B2Process for fabrication of FinFETsIBM·Filed 2006·Granted Dec 30, 2008·138 cites·14 claims
- 0298US9484267B1Stacked nanowire devicesIBM·Filed 2016·Granted Nov 1, 2016·35 cites·18 claims
- 0398US9484347B1FinFET CMOS with Si NFET and SiGe PFETIBM·Filed 2015·Granted Nov 1, 2016·22 cites·14 claims
- 0498US7683428B2Vertical Fin-FET MOS devicesIBM·Filed 2004·Granted Mar 23, 2010·221 cites·21 claims
- 0598US6590259B2Semiconductor device of an embedded DRAM on SOI substrateIBM·Filed 2001·Granted Jul 8, 2003·177 cites·16 claims
- 0698US6440872B1Method for hybrid DRAM cell utilizing confined strap isolationIBM·Filed 2000·Granted Aug 27, 2002·166 cites·15 claims
- 0798US6350653B1Embedded DRAM on silicon-on-insulator substrateIBM·Filed 2000·Granted Feb 26, 2002·236 cites·9 claims
- 0896US9997618B2Integrated strained stacked nanosheet FETIBM·Filed 2017·Granted Jun 12, 2018·9 cites·17 claims
- 0996US9735269B1Integrated strained stacked nanosheet FETIBM·Filed 2016·Granted Aug 15, 2017·12 cites·11 claims
- 1096US9614077B1Vertical finfet with strained channelIBM·Filed 2016·Granted Apr 4, 2017·15 cites·19 claims
- 1196US8236634B1Integration of fin-based devices and ETSOI devicesKANIKE NARASIMHULU·Filed 2011·Granted Aug 7, 2012·35 cites·16 claims
- 1296US6943409B1Trench optical deviceIBM·Filed 2004·Granted Sep 13, 2005·97 cites·20 claims
- 1396US6797553B2Method for making multiple threshold voltage FET using multiple work-function gate materialsIBM·Filed 2002·Granted Sep 28, 2004·119 cites·17 claims
- 1496US6492211B1Method for novel SOI DRAM BICMOS NPNIBM·Filed 2000·Granted Dec 10, 2002·144 cites·12 claims
- 1596US6406962B1Vertical trench-formed dual-gate FET device structure and method for creationIBM·Filed 2001·Granted Jun 18, 2002·139 cites·40 claims
- 1696US6339241B1Structure and process for 6F2 trench capacitor DRAM cell with vertical MOSFET and 3F bitline pitchIBM·Filed 2000·Granted Jan 15, 2002·73 cites·15 claims
- 1795US9917021B2Porous silicon relaxation medium for dislocation free CMOS devicesIBM·Filed 2016·Granted Mar 13, 2018·8 cites·8 claims
- 1895US9093496B2Process for faciltiating fin isolation schemesGLOBALFOUNDRIES INC·Filed 2013·Granted Jul 28, 2015·19 cites·21 claims
- 1995US8987823B2Method and structure for forming a localized SOI finFETIBM·Filed 2013·Granted Mar 24, 2015·20 cites·9 claims
- 2095US8928086B2Strained finFET with an electrically isolated channelIBM·Filed 2013·Granted Jan 6, 2015·19 cites·15 claims
- 2195US7129130B2Out of the box vertical transistor for eDRAM on SOIIBM·Filed 2005·Granted Oct 31, 2006·25 cites·10 claims
- 2295US6630379B2Method of manufacturing 6F2 trench capacitor DRAM cell having vertical MOSFET and 3F bitline pitchIBM·Filed 2001·Granted Oct 7, 2003·62 cites·20 claims
- 2395US6396121B1Structures and methods of anti-fuse formation in SOIIBM·Filed 2000·Granted May 28, 2002·73 cites·17 claims
- 2494US9997606B2Fully depleted SOI device for reducing parasitic back gate capacitanceIBM·Filed 2016·Granted Jun 12, 2018·8 cites·20 claims
- 2594US9559120B2Porous silicon relaxation medium for dislocation free CMOS devicesIBM·Filed 2015·Granted Jan 31, 2017·7 cites·8 claims
- 2694US9455314B1Y-FET with self-aligned punch-through-stop (PTS) dopingIBM·Filed 2016·Granted Sep 27, 2016·10 cites·20 claims
- 2794US9397002B1Self-aligned punchthrough stop doping in bulk finFET by reflowing doped oxideIBM·Filed 2015·Granted Jul 19, 2016·9 cites·10 claims
- 2894US9190520B2Strained finFET with an electrically isolated channelIBM·Filed 2014·Granted Nov 17, 2015·15 cites·18 claims
- 2994US8592264B2Source-drain extension formation in replacement metal gate transistor deviceANDO TAKASHI·Filed 2011·Granted Nov 26, 2013·17 cites·11 claims
- 3094US8536656B2Self-aligned contacts for high k/metal gate process flowRAMACHANDRAN RAVIKUMAR·Filed 2011·Granted Sep 17, 2013·27 cites·14 claims
- 3194US7459743B2Dual port gain cell with side and top gated read transistorIBM·Filed 2005·Granted Dec 2, 2008·27 cites·20 claims
- 3294US7439128B2Method of creating deep trench capacitor using a P+ metal electrodeIBM·Filed 2005·Granted Oct 21, 2008·22 cites·6 claims
- 3394US6573137B1Single sided buried strapINFINEON TECHNOLOGIES CORP·Filed 2000·Granted Jun 3, 2003·58 cites·12 claims
- 3494US6429068B1Structure and method of fabricating embedded vertical DRAM arrays with silicided bitline and polysilicon interconnectIBM·Filed 2001·Granted Aug 6, 2002·62 cites·20 claims
- 3593US9954109B2Vertical transistor including controlled gate length and a self-aligned junctionIBM·Filed 2016·Granted Apr 24, 2018·7 cites·16 claims
- 3693US9735234B1Stacked nanowire devicesIBM·Filed 2016·Granted Aug 15, 2017·6 cites·20 claims
- 3793US6426526B1Single sided buried strapIBM·Filed 2001·Granted Jul 30, 2002·53 cites·6 claims
- 3892US9349730B2Fin transformation process and isolation structures facilitating different Fin isolation schemesGLOBALFOUNDRIES INC·Filed 2013·Granted May 24, 2016·11 cites·20 claims
- 3992US7790530B2Dual port gain cell with side and top gated read transistorIBM·Filed 2008·Granted Sep 7, 2010·19 cites·7 claims
- 4092US7732872B2Integration scheme for multiple metal gate work function structuresIBM·Filed 2007·Granted Jun 8, 2010·24 cites·14 claims
- 4192US6440793B1Vertical MOSFETIBM·Filed 2001·Granted Aug 27, 2002·70 cites·6 claims
- 4292US6258659B1Embedded vertical DRAM cells and dual workfunction logic gatesIBM·Filed 2000·Granted Jul 10, 2001·56 cites·6 claims
- 4391US9911834B2Integrated strained stacked nanosheet FETIBM·Filed 2016·Granted Mar 6, 2018·4 cites·20 claims
- 4491US9425196B1Multiple threshold voltage FinFETsIBM·Filed 2015·Granted Aug 23, 2016·7 cites·18 claims
- 4591US8912607B2Replacement metal gate structures providing independent control on work function and gate leakage currentIBM·Filed 2013·Granted Dec 16, 2014·11 cites·20 claims
- 4691US8017997B2Vertical metal-insulator-metal (MIM) capacitor using gate stack, gate spacer and contact viaIBM·Filed 2008·Granted Sep 13, 2011·21 cites·12 claims
- 4791US7682859B2Patterned strained semiconductor substrate and deviceIBM·Filed 2007·Granted Mar 23, 2010·14 cites·18 claims
- 4891US7615816B2Buried plate structure for vertical dram devicesIBM·Filed 2007·Granted Nov 10, 2009·14 cites·3 claims
- 4991US7030012B2Method for manufacturing tungsten/polysilicon word line structure in vertical DRAMIBM·Filed 2004·Granted Apr 18, 2006·49 cites·20 claims
- 5091US6348374B1Process for 4F2 STC cell having vertical MOSFET and buried-bitline conductor structureIBM·Filed 2000·Granted Feb 19, 2002·45 cites·11 claims
Showing the top 50 of 276 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →