Inventor · disambiguated record
Rajesh Khamankar
Also filed as: KHAMANKAR RAJESH · KHAMANKAR RAJESH B
43 granted patents·15 pending applications·951 citations·filing 1998–2010
98Inventor score
Top patents by PatentIndex Score
58 records- 0197US6930007B2Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performanceTEXAS INSTRUMENTS INC·Filed 2003·Granted Aug 16, 2005·190 cites·2 claims
- 0293US6730566B2Method for non-thermally nitrided gate formation for high voltage devicesTEXAS INSTRUMENTS INC·Filed 2002·Granted May 4, 2004·74 cites·20 claims
- 0393US6610614B2Method for uniform nitridization of ultra-thin silicon dioxide layers in transistor gatesTEXAS INSTRUMENTS INC·Filed 2001·Granted Aug 26, 2003·67 cites·18 claims
- 0492US6503846B1Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gatesTEXAS INSTRUMENTS INC·Filed 2001·Granted Jan 7, 2003·64 cites·13 claims
- 0591US6548366B2Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profileTEXAS INSTRUMENTS INC·Filed 2001·Granted Apr 15, 2003·56 cites·16 claims
- 0690US6632747B2Method of ammonia annealing of ultra-thin silicon dioxide layers for uniform nitrogen profileTEXAS INSTRUMENTS INC·Filed 2001·Granted Oct 14, 2003·51 cites·11 claims
- 0787US8021990B2Gate structure and methodTEXAS INSTRUMENTS INC·Filed 2009·Granted Sep 20, 2011·11 cites·6 claims
- 0887US6555431B1Method for forming integrated circuit capacitor and memoryTEXAS INSTRUMENTS INC·Filed 2000·Granted Apr 29, 2003·36 cites·7 claims
- 0987US6153490AMethod for forming integrated circuit capacitor and memoryTEXAS INSTRUMENTS INC·Filed 1998·Granted Nov 28, 2000·75 cites·10 claims
- 1086US6716695B1Semiconductor with a nitrided silicon gate oxide and methodTEXAS INSTRUMENTS INC·Filed 2002·Granted Apr 6, 2004·35 cites·15 claims
- 1181US7012028B2Transistor fabrication methods using reduced width sidewall spacersTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 14, 2006·26 cites·24 claims
- 1278US7560792B2Reliable high voltage gate dielectric layers using a dual nitridation processTEXAS INSTRUMENTS INC·Filed 2007·Granted Jul 14, 2009·5 cites·4 claims
- 1378US7226834B2PMD liner nitride films and fabrication methods for improved NMOS performanceTEXAS INSTRUMENTS INC·Filed 2004·Granted Jun 5, 2007·21 cites·22 claims
- 1475US6600183B1Integrated circuit capacitor and memoryTEXAS INSTRUMENTS INC·Filed 1998·Granted Jul 29, 2003·46 cites·18 claims
- 1574US7217626B2Transistor fabrication methods using dual sidewall spacersTEXAS INSTRUMENTS INC·Filed 2004·Granted May 15, 2007·18 cites·21 claims
- 1673US7847401B2Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing stepsTEXAS INSTRUMENTS INC·Filed 2009·Granted Dec 7, 2010·3 cites·6 claims
- 1773US7670892B2Nitrogen based implants for defect reduction in strained siliconTEXAS INSTRUMENTS INC·Filed 2005·Granted Mar 2, 2010·3 cites·7 claims
- 1871US8084312B2Nitrogen based implants for defect reduction in strained siliconCHAKRAVARTHI SRINIVASAN·Filed 2010·Granted Dec 27, 2011·3 cites·9 claims
- 1971US7129127B2Integration scheme to improve NMOS with poly cap while mitigating PMOS degradationTEXAS INSTRUMENTS INC·Filed 2004·Granted Oct 31, 2006·16 cites·21 claims
- 2071US6956267B2Semiconductor with a nitrided silicon gate oxide and methodTEXAS INSTRUMENTS INC·Filed 2004·Granted Oct 18, 2005·14 cites·4 claims
- 2170US6780719B2Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixturesTEXAS INSTRUMENTS INC·Filed 2001·Granted Aug 24, 2004·13 cites·12 claims
- 2269US6197653B1Capacitor and memory structure and methodTEXAS INSTRUMENTS INC·Filed 1998·Granted Mar 6, 2001·29 cites·6 claims
- 2368US8114784B2Laminated stress overlayer using In-situ multiple plasma treatments for transistor improvementBU HAOWEN·Filed 2010·Granted Feb 14, 2012·2 cites·6 claims
- 2467US7553718B2Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing stepsTEXAS INSTRUMENTS INC·Filed 2005·Granted Jun 30, 2009·2 cites·12 claims
- 2567US7339240B2Dual-gate integrated circuit semiconductor deviceTEXAS INSTRUMENTS INC·Filed 2006·Granted Mar 4, 2008·2 cites·4 claims
- 2665US7535066B2Gate structure and methodTEXAS INSTRUMENTS INC·Filed 2003·Granted May 19, 2009·9 cites·3 claims
- 2764US8471307B2In-situ carbon doped e-SiGeCB stack for MOS transistorKHAMANKAR RAJESH B·Filed 2009·Granted Jun 25, 2013·4 cites·7 claims
- 2863US7514308B2CMOS device having different amounts of nitrogen in the NMOS gate dielectric layers and PMOS gate dielectric layersTEXAS INSTRUMENTS INC·Filed 2007·Granted Apr 7, 2009·2 cites·8 claims
- 2960US7049242B2Post high voltage gate dielectric pattern plasma surface treatmentTEXAS INSTRUMENTS INC·Filed 2004·Granted May 23, 2006·6 cites·21 claims
- 3060US7018925B2Post high voltage gate oxide pattern high-vacuum outgas surface treatmentTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 28, 2006·6 cites·11 claims
- 3159US6342420B1Hexagonally symmetric integrated circuit cellTEXAS INSTRUMENTS INC·Filed 2000·Granted Jan 29, 2002·13 cites·8 claims
- 3258US7183165B2Reliable high voltage gate dielectric layers using a dual nitridation processTEXAS INSTRUMENTS INC·Filed 2003·Granted Feb 27, 2007·5 cites·6 claims
- 3357US7227201B2CMOS device having different amounts of nitrogen in the NMOS gate dielectric layers and PMOS gate dielectric layersTEXAS INSTRUMENTS INC·Filed 2004·Granted Jun 5, 2007·6 cites·7 claims
- 3457US6326293B1Formation of recessed polysilicon plugs using chemical-mechanical-polishing (CMP) and selective oxidationTEXAS INSTRUMENTS INC·Filed 1998·Granted Dec 4, 2001·24 cites·11 claims
- 3555US7192894B2High performance CMOS transistors using PMD liner stressTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 20, 2007·5 cites·19 claims
- 3653US2008116542A1Gate Dielectric Having a Flat Nitrogen Profile and Method of Manufacture ThereforTEXAS INSTRUMENTS INC·Filed 2008·Application pending·0 cites
- 3752US2009152639A1Laminated Stress Overlayer Using In-SITU Multiple Plasma Treatments for Transistor ImprovementTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 3851US7345001B2Gate dielectric having a flat nitrogen profile and method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 18, 2008·2 cites·13 claims
- 3950US7402524B2Post high voltage gate oxide pattern high-vacuum outgas surface treatmentTEXAS INSTRUMENTS INC·Filed 2005·Granted Jul 22, 2008·0 cites·11 claims
- 4049US8084787B2PMD liner nitride films and fabrication methods for improved NMOS performanceBU HAOWEN·Filed 2007·Granted Dec 27, 2011·0 cites·8 claims
- 4149US7682988B2Thermal treatment of nitrided oxide to improve negative bias thermal instabilityTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 23, 2010·2 cites·21 claims
- 4248US7601575B2Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performanceTEXAS INSTRUMENTS INC·Filed 2005·Granted Oct 13, 2009·2 cites·18 claims
- 4345US8809141B2High performance CMOS transistors using PMD liner stressBU HAOWEN·Filed 2007·Granted Aug 19, 2014·0 cites·5 claims
- 4444US2009045472A1Methodology for Reducing Post Burn-In Vmin DriftTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 4543US2006154411A1CMOS transistors and methods of forming sameBU HAOWEN·Filed 2006·Application pending·0 cites
- 4642US2007210421A1Semiconductor device fabricated using a carbon-containing film as a contact etch stop layerTEXAS INSTRUMENTS INC·Filed 2006·Application pending·0 cites
- 4742US2008076076A1Rework methodology that preserves gate performanceTEXAS INSTRUMENTS INC·Filed 2006·Application pending·0 cites
- 4840US2005156286A1Method for improving a physical property defect value of a gate dielectricFiled 2005·Application pending·0 cites
- 4939US2003157773A1Semiconductor device having a dielectric layer with a uniform nitrogen profileFiled 2003·Application pending·0 cites
- 5038US2004262701A1Nitridation process for independent control of device gate leakage and drive currentTEXAS INSTRUMENTS INC·Filed 2004·Application pending·0 cites
Showing the top 50 of 58 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →