Inventor · disambiguated record
Robert L. Barry
Also filed as: BARRY ROBERT L · BARRY ROBERT LLOYD
19 granted patents·3 pending applications·213 citations·filing 1984–2018
93Inventor score
Top patents by PatentIndex Score
22 records- 0191US9431164B2High efficiency on-chip 3D transformer structureIBM·Filed 2015·Granted Aug 30, 2016·4 cites·4 claims
- 0291US7466284B2Chip seal ring having a serpentine geometryIBM·Filed 2006·Granted Dec 16, 2008·23 cites·2 claims
- 0384US5825785ASerial input shift register built-in self test circuit for embedded circuitsINTERNAITONAL BUSINESS MACHINE·Filed 1996·Granted Oct 20, 1998·63 cites·16 claims
- 0483US4663742ADirectory memory system having simultaneous write, compare and bypass capabilitesIBM·Filed 1984·Granted May 5, 1987·77 cites·13 claims
- 0582US9251948B2High efficiency on-chip 3D transformer structureIBM·Filed 2013·Granted Feb 2, 2016·4 cites·20 claims
- 0679US9171663B2High efficiency on-chip 3D transformer structureIBM·Filed 2013·Granted Oct 27, 2015·3 cites·11 claims
- 0775US8987067B2Segmented guard ring structures with electrically insulated gap structures and design structures thereofIBM·Filed 2013·Granted Mar 24, 2015·3 cites·10 claims
- 0874US8836460B2Folded conical inductorIBM·Filed 2012·Granted Sep 16, 2014·3 cites·18 claims
- 0970US9318620B2Folded conical inductorIBM·Filed 2014·Granted Apr 19, 2016·2 cites·4 claims
- 1063US9831026B2High efficiency on-chip 3D transformer structureGLOBALFOUNDRIES INC·Filed 2013·Granted Nov 28, 2017·1 cites·16 claims
- 1161US10049806B2High efficiency on-chip 3D transformer structureIBM·Filed 2015·Granted Aug 14, 2018·0 cites·2 claims
- 1261US6778419B2Complementary two transistor ROM cellIBM·Filed 2002·Granted Aug 17, 2004·11 cites·17 claims
- 1358US9779869B2High efficiency on-chip 3D transformer structureIBM·Filed 2013·Granted Oct 3, 2017·0 cites·19 claims
- 1457US11011295B2High efficiency on-chip 3D transformer structureIBM·Filed 2018·Granted May 18, 2021·0 cites·6 claims
- 1556US2015371760A1High efficiency on-chip 3d transformer structureIBM·Filed 2015·Application pending·0 cites
- 1652US2015035112A1Segmented guard ring structures with electrically insulated gap structures and design structures thereofIBM·Filed 2014·Application pending·0 cites
- 1747US4608667ADual mode logic circuit for a memory arrayIBM·Filed 1984·Granted Aug 26, 1986·6 cites·12 claims
- 1842US6922349B2Complementary two transistor ROM cellIBM·Filed 2004·Granted Jul 26, 2005·3 cites·6 claims
- 1942US5602788ARead only memory having localized reference bit linesIBM·Filed 1996·Granted Feb 11, 1997·10 cites·14 claims
- 2030US6675273B2Memory circuitry with auxiliary word line to obtain predictable array output when an invalid address is requestedIBM·Filed 2001·Granted Jan 6, 2004·0 cites·22 claims
- 2129US2003007393A1Method and apparatus for testing memory arraysIBM·Filed 2001·Application pending·0 cites
- 2219US5040145AMemory cell with active write loadIBM·Filed 1990·Granted Aug 13, 1991·0 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →