Inventor · disambiguated record
Sankaran M. Menon
Also filed as: MENON SANKARAN · MENON SANKARAN M
29 granted patents·9 pending applications·154 citations·filing 2001–2023
96Inventor score
Top patents by PatentIndex Score
38 records- 0196US9535117B2System debug using an all-in-one connectorINTEL CORP·Filed 2015·Granted Jan 3, 2017·13 cites·25 claims
- 0293US7313739B2Method and apparatus for testing embedded coresANALOG DEVICES INC·Filed 2002·Granted Dec 25, 2007·60 cites·20 claims
- 0391US7568141B2Method and apparatus for testing embedded coresINTEL CORP·Filed 2007·Granted Jul 28, 2009·19 cites·7 claims
- 0490US10845413B2Interfaces for wireless debuggingINTEL IP CORP·Filed 2018·Granted Nov 24, 2020·3 cites·23 claims
- 0588US9568547B2Method, apparatus and system for dynamic bandwidth management in systemsINTEL CORP·Filed 2015·Granted Feb 14, 2017·9 cites·21 claims
- 0685US10054636B2Device, system and method to support communication of test, debug or trace information with an external input/output interfaceINTEL IP CORP·Filed 2016·Granted Aug 21, 2018·2 cites·14 claims
- 0784US9989592B2Interfaces for wireless debuggingINTEL IP CORP·Filed 2015·Granted Jun 5, 2018·2 cites·10 claims
- 0880US10824530B2System, apparatus and method for non-intrusive platform telemetry reporting using an all-in-one connectorINTEL CORP·Filed 2017·Granted Nov 3, 2020·3 cites·20 claims
- 0980US10733077B2Techniques for monitoring errors and system performance using debug trace informationINTEL CORP·Filed 2017·Granted Aug 4, 2020·4 cites·22 claims
- 1079US8924786B2No-touch stress testing of memory I/O interfacesMENON SANKARAN M·Filed 2012·Granted Dec 30, 2014·9 cites·26 claims
- 1178US9753836B2Low power debug architecture for system-on-chips (SoCs) and systemsINTEL CORP·Filed 2014·Granted Sep 5, 2017·6 cites·22 claims
- 1277US11698412B2Device, system and method to support communication of test, debug or trace information with an external input/output interfaceINTEL CORP·Filed 2021·Granted Jul 11, 2023·0 cites·24 claims
- 1376US10996283B2Apparatus and method to debug a voltage regulatorINTEL CORP·Filed 2017·Granted May 4, 2021·1 cites·23 claims
- 1476US10718812B2Device, system and method to support communication of test, debug or trace information with an external input/output interfaceINTEL IP CORP·Filed 2018·Granted Jul 21, 2020·1 cites·28 claims
- 1575US9632895B2Apparatus, system and method for a common unified debug architecture for integrated circuits and SoCsMENON SANKARAN M·Filed 2013·Granted Apr 25, 2017·5 cites·28 claims
- 1675US9201448B2Observing embedded signals of varying clock domains by fowarding signals within a system on a chip concurrently with a logic module clock signalMENON SANKARAN M·Filed 2012·Granted Dec 1, 2015·4 cites·21 claims
- 1774US11157374B2Technologies for efficient reliable compute operations for mission critical applicationsINTEL CORP·Filed 2018·Granted Oct 26, 2021·2 cites·17 claims
- 1872US11709202B2Interfaces for wireless debuggingINTEL CORP·Filed 2020·Granted Jul 25, 2023·0 cites·20 claims
- 1972US11193973B2Device, system and method to support communication of test, debug or trace information with an external input/output interfaceINTEL CORP·Filed 2020·Granted Dec 7, 2021·0 cites·20 claims
- 2071US9043649B2Method and apparatus for output of high-bandwidth debug data/traces in ICS and SoCs using embedded high speed debugMENON SANKARAN M·Filed 2012·Granted May 26, 2015·3 cites·25 claims
- 2168US9372768B2Debug interfaceINTEL CORP·Filed 2013·Granted Jun 21, 2016·3 cites·25 claims
- 2265US11686780B2Apparatus and method to debug a voltage regulatorINTEL CORP·Filed 2021·Granted Jun 27, 2023·0 cites·19 claims
- 2362US8904253B2Method and apparatus for testing I/O boundary scan chain for SoC's having I/O's powered off by defaultMENON SANKARAN M·Filed 2012·Granted Dec 2, 2014·2 cites·30 claims
- 2458US10247773B2Systems and methods for wireless device testingINTEL CORP·Filed 2016·Granted Apr 2, 2019·1 cites·14 claims
- 2558US9784791B2Apparatus and method to debug a voltage regulatorINTEL CORP·Filed 2014·Granted Oct 10, 2017·1 cites·19 claims
- 2657US11933843B2Techniques to enable integrated circuit debug across low power statesINTEL CORP·Filed 2021·Granted Mar 19, 2024·0 cites·24 claims
- 2752US2025110175A1Method and apparatus to detect computing system hardware defects using a portable storage deviceINTEL CORP·Filed 2023·Application pending·0 cites
- 2850US8312309B2Technique for promoting determinism among multiple clock domainsHENDRICKSON ERIC L·Filed 2008·Granted Nov 13, 2012·1 cites·20 claims
- 2950US2024103077A1Method and apparatus for accessing remote test data registersINTEL CORP·Filed 2022·Application pending·0 cites
- 3050US2024385946A1Sensor-based control for debug invasivenessINTEL CORP·Filed 2023·Application pending·0 cites
- 3148US12183412B2Method and apparatus for enabling multiple return material authorizations (RMAs) on an integrated circuit deviceINTEL CORP·Filed 2020·Granted Dec 31, 2024·0 cites·20 claims
- 3248US2024103079A1Infield periodic device testing while maintaining host connectivityINTEL CORP·Filed 2022·Application pending·0 cites
- 3345US2006075296A1Method, apparatus and system for data integrity of state retentive elements under low power modesMENON SANKARAN M·Filed 2004·Application pending·0 cites
- 3441US10060966B2Method and apparatus for enhancing guardbands using “in-situ” silicon measurementsINTEL CORP·Filed 2015·Granted Aug 28, 2018·0 cites·20 claims
- 3538US2023195416A1Embedded Arithmetic Blocks for Structured ASICsINTEL CORP·Filed 2021·Application pending·0 cites
- 3637US2017286254A1Method and apparatus for using target or unit under test (uut) as debuggerINTEL CORP·Filed 2016·Application pending·0 cites
- 3734US2007136564A1Method and apparatus to save and restore context using scan cellsINTEL CORP·Filed 2005·Application pending·0 cites
- 3832US2003046625A1Method and apparatus for efficient control of multiple tap controllersFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →