Inventor · disambiguated record
Sergey Savastiouk
Also filed as: SAVASTIOUK SERGEY
28 granted patents·7 pending applications·2,938 citations·filing 1999–2015
98Inventor score
Files withTRU SI TECHNOLOGIES INC15INVENSAS CORP5SAVASTIOUK SERGEY5KOSENKO VALENTIN4TRUSI TECHNOLOGIES LLC2
Top patents by PatentIndex Score
35 records- 0199US7060601B2Packaging substrates for integrated circuits and soldering methodsTRU SI TECHNOLOGIES INC·Filed 2003·Granted Jun 13, 2006·394 cites·23 claims
- 0299US7049170B2Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavitiesTRU SI TECHNOLOGIES INC·Filed 2003·Granted May 23, 2006·429 cites·58 claims
- 0399US6693361B1Packaging of integrated circuits and vertical integrationTRU SI TECHNOLOGIES INC·Filed 2000·Granted Feb 17, 2004·427 cites·29 claims
- 0499US6322903B1Package of integrated circuits and vertical integrationTRU SI TECHNOLOGIES INC·Filed 1999·Granted Nov 27, 2001·903 cites·29 claims
- 0598US7241641B2Attachment of integrated circuit structures and other substrates to substrates with viasTRU SI TECHNOLOGIES INC·Filed 2005·Granted Jul 10, 2007·78 cites·27 claims
- 0698US7186586B2Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavitiesTRU SI TECHNOLOGIES INC·Filed 2005·Granted Mar 6, 2007·61 cites·27 claims
- 0798US7034401B2Packaging substrates for integrated circuits and soldering methodsTRU SI TECHNOLOGIES INC·Filed 2005·Granted Apr 25, 2006·101 cites·10 claims
- 0895US7510928B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesTRU SI TECHNOLOGIES INC·Filed 2006·Granted Mar 31, 2009·31 cites·4 claims
- 0994US7241675B2Attachment of integrated circuit structures and other substrates to substrates with viasTRU SI TECHNOLOGIES INC·Filed 2004·Granted Jul 10, 2007·65 cites·29 claims
- 1094US6897148B2Electroplating and electroless plating of conductive materials into openings, and structures obtained therebyTRU SI TECHNOLOGIES INC·Filed 2003·Granted May 24, 2005·123 cites·80 claims
- 1192US7521360B2Electroplating and electroless plating of conductive materials into openings, and structures obtained therebyTRU SI TECHNOLOGIES INC·Filed 2006·Granted Apr 21, 2009·43 cites·8 claims
- 1291US9018094B2Substrates with through vias with conductive features for connection to integrated circuit elements, and methods for forming through vias in substratesKOSENKO VALENTIN·Filed 2011·Granted Apr 28, 2015·15 cites·32 claims
- 1391US6498074B2Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and cornersTRU SI TECHNOLOGIES INC·Filed 2001·Granted Dec 24, 2002·98 cites·17 claims
- 1490US9111902B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesINVENSAS CORP·Filed 2014·Granted Aug 18, 2015·8 cites·11 claims
- 1587US7964508B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesALLVIA INC·Filed 2008·Granted Jun 21, 2011·16 cites·6 claims
- 1683US6448153B2Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and cornersTRU SI TECHNOLOGIES INC·Filed 2000·Granted Sep 10, 2002·30 cites·28 claims
- 1782US8757897B2Optical interposerKOSENKO VALENTIN·Filed 2012·Granted Jun 24, 2014·7 cites·52 claims
- 1881US6402843B1Non-contact workpiece holderTRUSI TECHNOLOGIES LLC·Filed 1999·Granted Jun 11, 2002·62 cites·13 claims
- 1980US8431431B2Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layersKOSENKO VALENTIN·Filed 2011·Granted Apr 30, 2013·4 cites·12 claims
- 2074US9589879B2Substrates with through vias with conductive features for connection to integrated circuit elements, and methods for forming through vias in substratesINVENSAS CORP·Filed 2015·Granted Mar 7, 2017·2 cites·25 claims
- 2170US9323010B2Structures formed using monocrystalline silicon and/or other materials for optical and other applicationsKOSENKO VALENTIN·Filed 2012·Granted Apr 26, 2016·3 cites·13 claims
- 2266US8829683B2Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layersINVENSAS CORP·Filed 2013·Granted Sep 9, 2014·1 cites·8 claims
- 2364US6203661B1Brim and gas escape for non-contact wafer holderTRUSI TECHNOLOGIES LLC·Filed 1999·Granted Mar 20, 2001·24 cites·16 claims
- 2461US6667242B2Brim and gas escape for non-contact wafer holderTRU SI TECHNOLOGIES INC·Filed 2001·Granted Dec 23, 2003·6 cites·12 claims
- 2560US8633589B2Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniquesSAVASTIOUK SERGEY·Filed 2007·Granted Jan 21, 2014·2 cites·19 claims
- 2658US9142511B2Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layersINVENSAS CORP·Filed 2014·Granted Sep 22, 2015·0 cites·8 claims
- 2758US6749764B1Plasma processing comprising three rotational motions of an article being processedTRU SI TECHNOLOGIES INC·Filed 2000·Granted Jun 15, 2004·5 cites·39 claims
- 2853US9515024B2Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductorINVENSAS CORP·Filed 2015·Granted Dec 6, 2016·0 cites·14 claims
- 2945US2008164574A1Integrated circuits with conductive features in through holes passing through other conductive features and through a semiconductor substrateSAVASTIOUK SERGEY·Filed 2008·Application pending·0 cites
- 3044US2005212127A1Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavitiesSAVASTIOUK SERGEY·Filed 2005·Application pending·0 cites
- 3142US2008136038A1Integrated circuits with conductive features in through holes passing through other conductive features and through a semiconductor substrateSAVASTIOUK SERGEY·Filed 2006·Application pending·0 cites
- 3241US2004016406A1Plasma processing comprising three rotational motions of an article being processedFiled 2003·Application pending·0 cites
- 3341US2008271995A1Agitation of electrolytic solution in electrodepositionSAVASTIOUK SERGEY·Filed 2007·Application pending·0 cites
- 3440US2008305580A1Bonding of structures together including, but not limited to, bonding a semiconductor wafer to a carrierBERGER ALEXANDER J·Filed 2007·Application pending·0 cites
- 3534US2005170647A1Electroplating and electroless plating of conductive materials into openings, and structures obtained therebyFiled 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →