Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities

Abstract

A packaging substrate ( 310 ) includes a semiconductor interposer ( 120 ) and at least one other intermediate substrate ( 110 ), e.g. a BT substrate. The semiconductor interposer has first contact pads ( 136 C) attachable to dies ( 124 ) above the interposer, and second contact pads ( 340 ) attachable to circuitry below the interposer. Through vias ( 330 ) are made in the semiconductor substrate ( 140 ) of the interposer ( 120 ). Conductive paths going through the through vias connect the first contact pads ( 136 C) to the second contact pads ( 340 ). The second contact pads ( 340 ) protrude on the bottom surface of the interposer. These protruding contact pads ( 340 ) are inserted into vias ( 920 ) formed in the top surface of the BT substrate. The vias provide a strong mechanical connection and facilitate the interposer handling, especially if the interposer is thin. In some embodiments, an interposer or a die ( 124.1 ) has vias in the top surface. Protruding contact pads ( 340.1, 340.2 ) of another die ( 124.1, 124.2 ) are inserted into these vias to provide a strong connection.

1 . A structure comprising: 
 (1) an interposer comprising:    a semiconductor substrate;    one or more first conductive contact pads attachable to circuitry placed above the interposer;    one or more second conductive contact pads attachable to circuitry placed below the interposer; and    one or more conductive paths passing through the semiconductor substrate and connecting at least one of the first contact pads to at least one of the second contact pads;    wherein each of the second contact pads is provided by a conductor formed in a corresponding via in the semiconductor substrate and protruding downward out of the via and out of the interposer at a bottom surface of the interposer, the conductor providing a downward protrusion underneath the via at the bottom surface of the interposer;    (2) an intermediate integrated circuit packaging substrate comprising:    a dielectric substrate or a plurality of dielectric substrates attached to each other;    one or more first conductive contact pads attachable to circuitry above the intermediate substrate;    one or more second conductive contact pads attachable to circuitry below the intermediate substrate;    one or more conductive paths each of which connects at least one first contact pad of the intermediate substrate to at least one second contact pad of the intermediate substrate;    wherein each of the one or more first contact pads of the intermediate substrate is formed in a corresponding via in the top surface of the intermediate substrate, each via extending into at least one of the dielectric substrates;    wherein the protrusions formed by the conductors of the interposer are inserted into the corresponding vias of the intermediate substrate and attached to the first contact pads of the intermediate substrate in the vias in the intermediate substrate.    
   
   
       2 . The structure of  claim 1  the bottom surface of the semiconductor substrate is spaced from the top surface of the intermediate substrate.  
   
   
       3 . The structure of  claim 2  a spacing between the bottom surface of the semiconductor substrate and the top surface of the intermediate substrate is at least 5 μm.  
   
   
       4 . The structure of  claim 1  wherein at least a portion of the bottom surface of the semiconductor substrate is not covered by any dielectric layer in the interposer.  
   
   
       5 . The structure of  claim 1  wherein at least 10 μm of each protrusion is inside of the corresponding via.  
   
   
       6 . The structure of  claim 1  wherein the intermediate substrate comprises said plurality of the dielectric substrates.  
   
   
       7 . The structure of  claim 6  wherein each of the vias in the intermediate substrate passes through at least one of the dielectric substrates.  
   
   
       8 . The structure of  claim 6  wherein the adjacent dielectric substrates are separated by conductive layers, and at least one of the conductive paths of the intermediate substrate passes through the conductive layers and through the dielectric substrates.  
   
   
       9 . The structure of  claim 8  wherein all of the dielectric substrates are made of the same material.  
   
   
       10 . The structure of  claim 1  wherein the dielectric substrate or substrates are made of an organic material.  
   
   
       11 . The structure of  claim 1  wherein the dielectric substrate or substrates are made of bis-maleimide triazine (BT).  
   
   
       12 . A structure comprising: 
 (1) an interposer comprising:    a semiconductor substrate;    one or more first conductive contact pads attachable to circuitry placed above the interposer;    one or more second conductive contact pads attachable to circuitry placed below the interposer; and    one or more conductive paths passing through the semiconductor substrate and connecting at least one of the first contact pads to at least one of the second contact pads;    wherein each of the second contact pads protrudes out at a bottom surface of the interposer;    (2) an intermediate integrated circuit packaging substrate comprising:    a dielectric substrate or a plurality of dielectric substrates attached to each other;    one or more first conductive contact pads attachable to circuitry above the intermediate substrate;    one or more second conductive contact pads attachable to circuitry below the intermediate substrate;    one or more conductive paths each of which connects at least one first contact pad of the intermediate substrate to at least one second contact pad of the intermediate substrate;    wherein each of the one or more first contact pads of the intermediate substrate is formed in a corresponding via in the top surface of the intermediate substrate, each via extending into at least one of the dielectric substrates;    wherein the protruding second contact pads of the interposer are inserted into the corresponding vias of the intermediate substrate and soldered in the vias to the first contact pads of the intermediate substrate with solder.    
   
   
       13 . The structure of  claim 12  a spacing between the bottom surface of the semiconductor substrate and the top surface of the intermediate substrate is at least 5 μm.  
   
   
       14 . The structure of  claim 12  wherein at least a portion of the bottom surface of the semiconductor substrate is not covered by any dielectric layer in the interposer.  
   
   
       15 . The structure of  claim 12  wherein at least 10 μm of each protrusion is inside of the corresponding via.  
   
   
       16 . The structure of  claim 12  wherein the intermediate substrate comprises said plurality of the dielectric substrates.  
   
   
       17 . The structure of  claim 16  wherein each of the vias in the intermediate substrate passes through at least one of the dielectric substrates.  
   
   
       18 . The structure of  claim 16  wherein the adjacent dielectric substrates are separated by conductive layers, and at least one of the conductive paths of the intermediate substrate passes through the conductive layers and through the dielectric substrates.  
   
   
       19 . The structure of  claim 18  wherein all of the dielectric substrates are made of the same material.  
   
   
       20 . The structure of  claim 18  wherein the dielectric substrate or substrates are made of an organic material.  
   
   
       21 . The structure of  claim 18  wherein the dielectric substrate or substrates are made of bis-maleimide triazine (BT).  
   
   
       22 . An intermediate substrate for providing interconnects between an integrated circuit die and a printed circuit board, the intermediate substrate comprising: 
 a plurality of dielectric substrates attached to each other and comprising a top dielectric substrate and one or more dielectric substrates below the top dielectric substrate;    one or more first conductive contact pads attachable to circuitry above the intermediate substrate;    one or more second conductive contact pads attachable to circuitry below the intermediate substrate;    one or more conductive paths each of which passes through at least one of the dielectric substrates and connects at least one first contact pad to at least one second contact pad;    wherein a first portion of each of the one or more first contact pads is formed below the top dielectric substrate, and a corresponding via is provided through at least the top dielectric substrate, the via terminating at the first portion of the first contact pad;    wherein each of the one or more first contact pads comprises a second portion formed on the sidewalls of the via, the first and second portions allowing insertion into the via of a contact pad external to the intermediate substrate for attachment to the first contact pad.    
   
   
       23 . The structure of  claim 22  wherein the adjacent dielectric substrates are separated by conductive layers, and at least one of the conductive paths of the intermediate substrate passes through the conductive layers and through the dielectric substrates.  
   
   
       24 . The structure of  claim 22  wherein the dielectric substrate or substrates are made of bis-maleimide triazine (BT).  
   
   
       25 . An intermediate substrate for providing interconnects between an integrated circuit die and a printed circuit board, the intermediate substrate comprising: 
 a plurality of dielectric substrates attached to each other and comprising a top dielectric substrate and one or more dielectric substrates below the top dielectric substrate;    one or more first conductive contact pads attachable to circuitry above the intermediate substrate;    one or more second conductive contact pads attachable to circuitry below the intermediate substrate;    one or more conductive paths each of which passes through at least one of the dielectric substrates and connects at least one first contact pad to at least one second contact pad;    wherein all the dielectric substrates are made of the same material;    wherein at least a first portion of each of the one or more first contact pads is formed below the top dielectric substrate, and a corresponding via is provided through at least the top dielectric substrate, the via terminating at the first portion of the first contact pad.    
   
   
       26 . The structure of  claim 25  wherein the adjacent dielectric substrates are separated by conductive layers, and at least one of the conductive paths of the intermediate substrate passes through the conductive layers and through the dielectric substrates.  
   
   
       27 . The structure of  claim 25  wherein the dielectric substrates are made of an organic material.  
   
   
       28 . The structure of  claim 25  wherein the dielectric substrates are made of bis-maleimide triazine (BT).  
   
   
       29 . A structure comprising: 
 (1) a first structure comprising:    a semiconductor substrate;    one or more first conductive contact pads attachable to circuitry placed above the first structure;    one or more second conductive contact pads attachable to circuitry placed below the first structure; and    one or more conductive paths passing through the semiconductor substrate and connecting at least one of the first contact pads to at least one of the second contact pads;    wherein each of the second contact pads is provided by a conductor formed in a corresponding via in the semiconductor substrate and protruding downward out of the via and out of the first structure at a bottom surface of the first structure, the conductor providing a downward protrusion underneath the via at the bottom surface of the first structure;    (2) a second structure comprising:    a second semiconductor substrate;    a dielectric layer overlying the second semiconductor substrate;    one or more first conductive contact pads attachable to circuitry above the second structure;    wherein each of the one or more first contact pads of the second structure is formed in a corresponding via in the top surface of the second structure, each via extending into the dielectric layer;    wherein the protrusions formed by the conductors of the first structure are inserted into the corresponding vias of the second structure and attached to the first contact pads of the second structure in the vias in the second structure.    
   
   
       30 . The structure of  claim 29  wherein the second structure further comprises: 
 one or more second conductive contact pads attachable to circuitry below the second structure; and    one or more conductive paths each of which passes through the second semiconductor substrate and connects at least one first contact pad of the second structure to at least one second contact pad of the second structure.    
   
   
       31 . The structure of  claim 29  wherein the second structure is an interposer which is an intermediate integrated circuit packaging substrate.  
   
   
       32 . The structure of  claim 29  wherein the bottom surface of the first semiconductor substrate is spaced from the top surface of the second structure.  
   
   
       33 . The structure of  claim 32  wherein a spacing between the bottom surface of the first semiconductor substrate and the top surface of the second structure is at least 5 μm.  
   
   
       34 . The structure of  claim 29  wherein at least a portion of the bottom surface of the first semiconductor substrate is not covered by any dielectric layer in the first structure.  
   
   
       35 . The structure of  claim 29  wherein at least 10 μm of each protrusion is inside of the corresponding via.  
   
   
       36 . A structure comprising: 
 (1) a first structure comprising:    a first semiconductor substrate;    one or more first conductive contact pads attachable to circuitry placed above the first structure;    one or more second conductive contact pads attachable to circuitry placed below the first structure; and    one or more conductive paths passing through the first semiconductor substrate and connecting at least one of the first contact pads to at least one of the second contact pads;    wherein each of the second contact pads protrudes out at a bottom surface of the first structure;    (2) a second substrate comprising:    a second semiconductor substrate;    a dielectric layer overlying the second semiconductor substrate;    one or more first conductive contact pads attachable to circuitry above the second structure;    wherein each of the one or more first contact pads of the second structure is formed in a corresponding via in the top surface of the second structure, each via extending into the dielectric layer;    wherein the protruding second contact pads of the first structure are inserted into the corresponding vias of the second structure and soldered in the vias to the first contact pads of the second structure with solder.    
   
   
       37 . The structure of  claim 36  a spacing between the bottom surface of the first semiconductor substrate and the top surface of the second structure is at least 5 μm.  
   
   
       38 . The structure of  claim 36  wherein at least a portion of the bottom surface of the first semiconductor substrate is not covered by any dielectric layer in the first structure.  
   
   
       39 . The structure of  claim 36  wherein at least 10 μm of each protrusion is inside of the corresponding via.  
   
   
       40 . An integrated circuit comprising: 
 a semiconductor substrate;    a dielectric layer overlying the semiconductor substrate;    one or more first conductive contact pads attachable to circuitry above the integrated circuit;    wherein a first portion of each of the one or more first contact pads is formed below the dielectric layer, and a corresponding via is provided through the dielectric layer, the via terminating at the first portion of the first contact pad;    wherein each of the one or more first contact pads comprises a second portion formed on the sidewalls of the via, the first and second portions allowing insertion into the via of a contact pad external to the integrated circuit for attachment to the first contact pad.