Inventor · disambiguated record
Shreesh Narasimha
Also filed as: NARASIMHA SHREESH
115 granted patents·48 pending applications·921 citations·filing 2002–2024
99Inventor score
Top patents by PatentIndex Score
163 records- 0198US9437496B1Merged source drain epitaxyGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 6, 2016·26 cites·20 claims
- 0297US9577061B2Asymmetric high-K dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Feb 21, 2017·11 cites·4 claims
- 0397US9570354B2Asymmetric high-K dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Feb 14, 2017·12 cites·14 claims
- 0497US9412667B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2014·Granted Aug 9, 2016·22 cites·17 claims
- 0597US7329923B2High-performance CMOS devices on hybrid crystal oriented substratesIBM·Filed 2003·Granted Feb 12, 2008·138 cites·5 claims
- 0696US10074571B1Device with decreased pitch contact to active regionsGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 11, 2018·17 cites·19 claims
- 0796US9859122B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2017·Granted Jan 2, 2018·7 cites·7 claims
- 0896US9768195B2Semiconductor structure with integrated passive structuresIBM·Filed 2016·Granted Sep 19, 2017·8 cites·16 claims
- 0996US9685379B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Jun 20, 2017·9 cites·8 claims
- 1096US9543213B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Jan 10, 2017·10 cites·12 claims
- 1195US9768071B2Asymmetric high-K dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Sep 19, 2017·6 cites·16 claims
- 1295US9559010B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Jan 31, 2017·7 cites·7 claims
- 1395US8097515B2Self-aligned contacts for nanowire field effect transistorsBANGSARUNTIP SARUNYA·Filed 2009·Granted Jan 17, 2012·36 cites·16 claims
- 1495US7001844B2Material for contact etch layer to enhance device performanceIBM·Filed 2004·Granted Feb 21, 2006·74 cites·35 claims
- 1594US9922831B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2017·Granted Mar 20, 2018·5 cites·9 claims
- 1694US9786545B1Method of forming ANA regions in an integrated circuitGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 10, 2017·11 cites·20 claims
- 1794US9721843B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Aug 1, 2017·6 cites·13 claims
- 1894US7274072B2Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performanceIBM·Filed 2005·Granted Sep 25, 2007·33 cites·30 claims
- 1993US10083878B1Fin fabrication process with dual shallow trench isolation and tunable inner and outer fin profileGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 25, 2018·9 cites·13 claims
- 2093US7538391B2Curved FINFETsIBM·Filed 2007·Granted May 26, 2009·28 cites·10 claims
- 2192US10367072B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2017·Granted Jul 30, 2019·3 cites·13 claims
- 2292US8916950B2Shallow trench isolation structure having a nitride plugKIM BYEONG Y·Filed 2011·Granted Dec 23, 2014·13 cites·17 claims
- 2392US8455334B2Planar and nanowire field effect transistorsBANGSARUNTIP SARUNYA·Filed 2009·Granted Jun 4, 2013·19 cites·20 claims
- 2492US6991979B2Method for avoiding oxide undercut during pre-silicide clean for thin spacer FETsIBM·Filed 2003·Granted Jan 31, 2006·52 cites·9 claims
- 2591US9269786B2Silicon nitride layer deposited at low temperature to prevent gate dielectric regrowth high-K metal gate field effect transistorsGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 23, 2016·13 cites·20 claims
- 2690US9837319B2Asymmetric high-K dielectric for reducing gate induced drain leakageIBM·Filed 2016·Granted Dec 5, 2017·3 cites·13 claims
- 2790US8586966B2Contacts for nanowire field effect transistorsBANGSARUNTIP SARUNYA·Filed 2012·Granted Nov 19, 2013·19 cites·10 claims
- 2888US7714358B2Semiconductor structure and method of forming the structureIBM·Filed 2007·Granted May 11, 2010·12 cites·19 claims
- 2988US7550337B2Dual gate dielectric SRAMIBM·Filed 2007·Granted Jun 23, 2009·15 cites·10 claims
- 3088US6825102B1Method of improving the quality of defective semiconductor materialIBM·Filed 2003·Granted Nov 30, 2004·40 cites·30 claims
- 3187US8940595B2Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levelsIBM·Filed 2013·Granted Jan 27, 2015·8 cites·20 claims
- 3286US9812324B1Methods to control fin tip placementGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 7, 2017·4 cites·14 claims
- 3386US8952460B2Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for CMOS devicesIBM·Filed 2013·Granted Feb 10, 2015·7 cites·7 claims
- 3486US8343825B2Reducing dislocation formation in semiconductor devices through targeted carbon implantationIBM·Filed 2011·Granted Jan 1, 2013·7 cites·21 claims
- 3586US7595247B2Halo-first ultra-thin SOI FET for superior short channel controlIBM·Filed 2007·Granted Sep 29, 2009·11 cites·11 claims
- 3685US9136321B1Low energy ion implantation of a junction butting regionIBM·Filed 2014·Granted Sep 15, 2015·6 cites·12 claims
- 3785US8343781B2Electrical mask inspectionIBM·Filed 2010·Granted Jan 1, 2013·6 cites·12 claims
- 3885US8053325B1Body contact structures and methods of manufacturing the sameIBM·Filed 2010·Granted Nov 8, 2011·8 cites·26 claims
- 3985US7627836B2OPC trimming for performanceIBM·Filed 2005·Granted Dec 1, 2009·15 cites·7 claims
- 4084US10374048B2Asymmetric high-k dielectric for reducing gate induced drain leakageIBM·Filed 2017·Granted Aug 6, 2019·1 cites·10 claims
- 4183US9287399B2Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levelsIBM·Filed 2014·Granted Mar 15, 2016·5 cites·16 claims
- 4283US8741725B2Butted SOI junction isolation structures and devices and method of fabricationJOHNSON JEFFREY B·Filed 2010·Granted Jun 3, 2014·6 cites·22 claims
- 4382US8592295B2Gate-all around semiconductor nanowire FETs on bulk semiconductor wafersIBM·Filed 2013·Granted Nov 26, 2013·5 cites·15 claims
- 4482US8536563B2Nanowire field effect transistorsBANGSARUNTIP SARUNYA·Filed 2010·Granted Sep 17, 2013·5 cites·3 claims
- 4582US8513068B2Nanowire field effect transistorsBANGSARUNTIP SARUNYA·Filed 2012·Granted Aug 20, 2013·5 cites·13 claims
- 4682US7893494B2Method and structure for SOI body contact FET with reduced parasitic capacitanceIBM·Filed 2008·Granted Feb 22, 2011·9 cites·20 claims
- 4781US9219059B2Semiconductor structure with integrated passive structuresIBM·Filed 2012·Granted Dec 22, 2015·2 cites·13 claims
- 4881US8698128B2Gate-all around semiconductor nanowire FET's on bulk semicoductor wafersSLEIGHT JEFFREY W·Filed 2012·Granted Apr 15, 2014·5 cites·17 claims
- 4981US7462916B2Semiconductor devices having torsional stressesIBM·Filed 2006·Granted Dec 9, 2008·10 cites·4 claims
- 5080US10833160B1Field-effect transistors with self-aligned and non-self-aligned contact openingsGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 10, 2020·3 cites·9 claims
Showing the top 50 of 163 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →