Inventor · disambiguated record
Shantanu Sarangi
Also filed as: SARANGI SHANTANU · SARANGI SHANTANU K
27 granted patents·3 pending applications·32 citations·filing 2013–2025
94Inventor score
Top patents by PatentIndex Score
30 records- 0195US11726139B2In-system test of chips in functional systemsNVIDIA CORP·Filed 2022·Granted Aug 15, 2023·3 cites·20 claims
- 0289US12078678B2In system test of chips in functional systemsNVIDIA CORP·Filed 2023·Granted Sep 3, 2024·1 cites·20 claims
- 0389US10281524B2Test partition external input/output interface control for test partitions in a semiconductorNVIDIA CORP·Filed 2016·Granted May 7, 2019·6 cites·12 claims
- 0487US11573872B2Leveraging low power states for fault testing of processing cores at runtimeNVIDIA CORP·Filed 2021·Granted Feb 7, 2023·1 cites·23 claims
- 0587US10317463B2Scan system interface (SSI) moduleNVIDIA CORP·Filed 2016·Granted Jun 11, 2019·6 cites·18 claims
- 0686US11408934B2In system test of chips in functional systemsNVIDIA CORP·Filed 2018·Granted Aug 9, 2022·4 cites·22 claims
- 0784US11526644B2Controlling test networks of chips using integrated processorsNVIDIA CORP·Filed 2020·Granted Dec 13, 2022·2 cites·27 claims
- 0881US2024419568A1Leveraging low power states for fault testing of processing cores at runtimeNVIDIA CORP·Filed 2024·Application pending·0 cites
- 0979US11867744B2Techniques for isolating interfaces while testing semiconductor devicesNVIDIA CORP·Filed 2020·Granted Jan 9, 2024·1 cites·20 claims
- 1078US10444280B2Independent test partition clock coordination across multiple test partitionsNVIDIA CORP·Filed 2016·Granted Oct 15, 2019·2 cites·20 claims
- 1177US12124346B2Leveraging low power states for fault testing of processing cores at runtimeNVIDIA CORP·Filed 2022·Granted Oct 22, 2024·0 cites·20 claims
- 1277US12079097B2Techniques for testing semiconductor devicesNVIDIA CORP·Filed 2020·Granted Sep 3, 2024·1 cites·20 claims
- 1375US10663515B2Method and apparatus to access high volume test data over high speed interfacesNVIDIA CORP·Filed 2018·Granted May 26, 2020·2 cites·19 claims
- 1473US2025222941A1Localized in-system testing for autonomous and semi-autonomous systems and applicationsNVIDIA CORP·Filed 2025·Application pending·0 cites
- 1572US12291219B2Asynchronous in-system testing for autonomous systems and applicationsNVIDIA CORP·Filed 2022·Granted May 6, 2025·0 cites·19 claims
- 1671US10746798B1Field adaptable in-system test mechanismsNVIDIA CORP·Filed 2019·Granted Aug 18, 2020·1 cites·18 claims
- 1766US12480990B2Technique for enabling on-die noise measurement during ate testing and ISTNVIDIA CORP·Filed 2022·Granted Nov 25, 2025·0 cites·45 claims
- 1866US11204849B2Leveraging low power states for fault testing of processing cores at runtimeNVIDIA CORP·Filed 2020·Granted Dec 21, 2021·0 cites·20 claims
- 1965US10890620B2On-chip execution of in-system test utilizing a generalized test imageNVIDIA CORP·Filed 2019·Granted Jan 12, 2021·1 cites·18 claims
- 2061US9262293B2Debug apparatus and methods for dynamically switching power domainsADVANCED MICRO DEVICES INC·Filed 2013·Granted Feb 16, 2016·1 cites·18 claims
- 2158US10545189B2Granular dynamic test systems and methodsNVIDIA CORP·Filed 2016·Granted Jan 28, 2020·0 cites·25 claims
- 2257US12461880B2Test data transfer in multi-die systemsNVIDIA CORP·Filed 2024·Granted Nov 4, 2025·0 cites·25 claims
- 2355US10473720B2Dynamic independent test partition clockNVIDIA CORP·Filed 2016·Granted Nov 12, 2019·0 cites·12 claims
- 2455US10451676B2Method and system for dynamic standard test access (DSTA) for a logic block reuseNVIDIA CORP·Filed 2016·Granted Oct 22, 2019·0 cites·20 claims
- 2549US11668750B2Performing testing utilizing staggered clocksNVIDIA CORP·Filed 2021·Granted Jun 6, 2023·0 cites·18 claims
- 2649US10481203B2Granular dynamic test systems and methodsNVIDIA CORP·Filed 2017·Granted Nov 19, 2019·0 cites·20 claims
- 2749US9377506B2Chip debug during power gating eventsADVANCED MICRO DEVICES INC·Filed 2014·Granted Jun 28, 2016·0 cites·20 claims
- 2847US9329963B2Debug apparatus and methods for dynamically switching power domainsADVANCED MICRO DEVICES INC·Filed 2013·Granted May 3, 2016·0 cites·18 claims
- 2946US11494370B2Hardware-controlled updating of a physical operating parameter for in-field fault detectionNVIDIA CORP·Filed 2020·Granted Nov 8, 2022·0 cites·21 claims
- 3039US2022365857A1Runtime in-system testingNVIDIA CORP·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →