Inventor · disambiguated record
Sitaram Yadavalli
Also filed as: YADAVALLI SITARAM
12 granted patents·7 pending applications·77 citations·filing 1998–2024
89Inventor score
Top patents by PatentIndex Score
19 records- 0193US11237828B2Secure matrix space with partitions for concurrent useONNIVATION LLC·Filed 2020·Granted Feb 1, 2022·5 cites·27 claims
- 0291US11907714B2Secure matrix space with partitions for concurrent useONNIVATION LLC·Filed 2021·Granted Feb 20, 2024·2 cites·29 claims
- 0391US10600475B2Method and apparatus for storing and accessing matrices and arrays by columns and rows in a processing unitYADAVALLI SITARAM·Filed 2017·Granted Mar 24, 2020·22 cites·21 claims
- 0485US11740903B2Computing machine using a matrix space and matrix pointer registers for matrix and array processingONNIVATION LLC·Filed 2019·Granted Aug 29, 2023·4 cites·14 claims
- 0580US2025165252A1Computing machine with secure matrix space of row and column major access memoryONNIVATION LLC·Filed 2024·Application pending·0 cites
- 0677US7168010B2Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locationsINTEL CORP·Filed 2002·Granted Jan 23, 2007·31 cites·18 claims
- 0776US12197914B2Computing machine with secure matrix spaceYADAVALLI SITARAM·Filed 2024·Granted Jan 14, 2025·0 cites·28 claims
- 0871US2024004655A1Computing Machine Using a Matrix Space And Matrix Pointer Registers For Matrix and Array ProcessingONNIVATION LLC·Filed 2023·Application pending·0 cites
- 0971US2024004654A1Computing System with Hardware and Methods for Handling Immediate Operands in Machine InstructionsONNIVATION LLC·Filed 2023·Application pending·0 cites
- 1070US9170626B2Performance reduction limit for power consumption deviceCLINE LESLIE E·Filed 2011·Granted Oct 27, 2015·4 cites·16 claims
- 1165US12197915B2Parallel instruction demarcatorONNIVATION LLC·Filed 2021·Granted Jan 14, 2025·0 cites·26 claims
- 1259US11204768B2Instruction length based parallel instruction demarcatorONNIVATION LLC·Filed 2020·Granted Dec 21, 2021·0 cites·19 claims
- 1358US7884499B2Intervention of independent self-regulation of power consumption devicesINTEL CORP·Filed 2008·Granted Feb 8, 2011·1 cites·16 claims
- 1453US6973422B1Method and apparatus for modeling and circuits with asynchronous behaviorINTEL CORP·Filed 2000·Granted Dec 6, 2005·4 cites·18 claims
- 1553US2024281251A1Instruction length based parallel instruction demarcatorYADAVALLI SITARAM·Filed 2024·Application pending·0 cites
- 1653US2025306938A1Instruction operand prefixing combinator and decoder for extensibility and backward compatibilityYADAVALLI SITARAM·Filed 2024·Application pending·0 cites
- 1753US2024281707A1Instruction operand prefixing combinator and decoder for extensibility and backward compatibilityYADAVALLI SITARAM·Filed 2024·Application pending·0 cites
- 1836US2017337156A1Computing machine architecture for matrix and array processingYADAVALLI SITARAM·Filed 2017·Application pending·0 cites
- 1931US6237121B1Method and apparatus for performing register transfer level scan selectionINTEL CORP·Filed 1998·Granted May 22, 2001·4 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →