Inventor · disambiguated record
Stefan Flachowsky
Also filed as: FLACHOWSKY STEFAN
109 granted patents·42 pending applications·394 citations·filing 2010–2018
99Inventor score
Top patents by PatentIndex Score
151 records- 0197US9425318B1Integrated circuits with fets having nanowires and methods of manufacturing the sameGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 23, 2016·32 cites·19 claims
- 0296US8936977B2Late in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantationsHOENTSCHEL JAN·Filed 2012·Granted Jan 20, 2015·21 cites·14 claims
- 0396US8703578B2Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantationsHOENTSCHEL JAN·Filed 2012·Granted Apr 22, 2014·22 cites·15 claims
- 0495US9865608B2Method of forming a device including a floating gate electrode and a layer of ferroelectric materialGLOBALFOUNDRIES INC·Filed 2016·Granted Jan 9, 2018·12 cites·8 claims
- 0595US9224840B2Replacement gate FinFET structures with high mobility channelFLACHOWSKY STEFAN·Filed 2012·Granted Dec 29, 2015·27 cites·12 claims
- 0695US8975704B2Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantationsGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Mar 10, 2015·18 cites·20 claims
- 0792US9449972B1Ferroelectric FinFETGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 20, 2016·7 cites·16 claims
- 0892US8574981B2Method of increasing the germanium concentration in a silicon-germanium layer and semiconductor device comprising sameFLACHOWSKY STEFAN·Filed 2011·Granted Nov 5, 2013·13 cites·18 claims
- 0991US8598007B1Methods of performing highly tilted halo implantation processes on semiconductor devicesFLACHOWSKY STEFAN·Filed 2012·Granted Dec 3, 2013·11 cites·23 claims
- 1090US8835936B2Source and drain doping using doped raised source and drain regionsGLOBALFOUNDRIES INC·Filed 2012·Granted Sep 16, 2014·11 cites·24 claims
- 1190US8722500B2Methods for fabricating integrated circuits having gate to active and gate to gate interconnectsSCHEIPER THILO·Filed 2011·Granted May 13, 2014·10 cites·9 claims
- 1289US9391176B2Multi-gate FETs having corrugated semiconductor stacks and method of forming the sameGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 12, 2016·9 cites·17 claims
- 1389US8912606B2Integrated circuits having protruding source and drain regions and methods for forming integrated circuitsBALDAUF TIM·Filed 2012·Granted Dec 16, 2014·16 cites·14 claims
- 1489US8524563B2Semiconductor device with strain-inducing regions and method thereofFLACHOWSKY STEFAN·Filed 2012·Granted Sep 3, 2013·8 cites·12 claims
- 1587US9899417B2Semiconductor structure including a first transistor and a second transistorGLOBALFOUNDRIES INC·Filed 2017·Granted Feb 20, 2018·4 cites·20 claims
- 1687US9515155B2E-fuse design for high-K metal-gate technologyGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 6, 2016·9 cites·23 claims
- 1787US9012956B2Channel SiGe removal from PFET source/drain region for improved silicide formation in HKMG technologies without embedded SiGeGLOBALFOUNDRIES INC·Filed 2013·Granted Apr 21, 2015·8 cites·19 claims
- 1887US9012277B2In situ doping and diffusionless annealing of embedded stressor regions in PMOS and NMOS devicesFLACHOWSKY STEFAN·Filed 2012·Granted Apr 21, 2015·8 cites·27 claims
- 1986US9214396B1Transistor with embedded stress-inducing layersGLOBALFOUNDRIES INC·Filed 2014·Granted Dec 15, 2015·8 cites·20 claims
- 2086US8809151B2Transistor comprising an embedded sigma shaped sequentially formed semiconductor alloyFLACHOWSKY STEFAN·Filed 2011·Granted Aug 19, 2014·8 cites·17 claims
- 2186US8471342B1Integrated circuits formed on strained substrates and including relaxed buffer layers and methods for the manufacture thereofFLACHOWSKY STEFAN·Filed 2011·Granted Jun 25, 2013·8 cites·20 claims
- 2284US8524566B2Methods for the fabrication of integrated circuits including back-etching of raised conductive structuresFLACHOWSKY STEFAN·Filed 2011·Granted Sep 3, 2013·7 cites·20 claims
- 2384US8501601B2Drive current increase in field effect transistors by asymmetric concentration profile of alloy species of a channel semiconductor alloyFLACHOWSKY STEFAN·Filed 2011·Granted Aug 6, 2013·6 cites·15 claims
- 2483US9412859B2Contact geometry having a gate silicon length decoupled from a transistor lengthGLOBALFOUNDRIES INC·Filed 2013·Granted Aug 9, 2016·5 cites·24 claims
- 2583US8536034B2Methods of forming stressed silicon-carbon areas in an NMOS transistorFLACHOWSKY STEFAN·Filed 2011·Granted Sep 17, 2013·5 cites·20 claims
- 2682US9023713B2Ultrathin body fully depleted silicon-on-insulator integrated circuits and methods for fabricating sameILLGEN RALF·Filed 2012·Granted May 5, 2015·5 cites·17 claims
- 2780US11424253B2Device including a floating gate electrode and a layer of ferroelectric material and method for the formation thereofFRAUNHOFER GES FORSCHUNG·Filed 2018·Granted Aug 23, 2022·2 cites·9 claims
- 2880US8735241B1Semiconductor device structure and methods for forming a CMOS integrated circuit structureGLOBALFOUNDRIES INC·Filed 2013·Granted May 27, 2014·4 cites·13 claims
- 2979US9136177B2Methods of forming transistor devices with high-k insulation layers and the resulting devicesGERHARDT MARTIN·Filed 2012·Granted Sep 15, 2015·5 cites·19 claims
- 3079US8963208B2Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereofGLOBALFOUNDRIES INC·Filed 2012·Granted Feb 24, 2015·3 cites·10 claims
- 3179US8698243B2Semiconductor device with strain-inducing regions and method thereofFLACHOWSKY STEFAN·Filed 2013·Granted Apr 15, 2014·3 cites·6 claims
- 3279US8524564B2Full silicidation prevention via dual nickel deposition approachJAVORKA PETER·Filed 2011·Granted Sep 3, 2013·4 cites·14 claims
- 3377US8759922B2Full silicidation prevention via dual nickel deposition approachGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 24, 2014·3 cites·20 claims
- 3476US9472642B2Method of forming a semiconductor device structure and such a semiconductor device structureGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 18, 2016·2 cites·25 claims
- 3576US9209274B2Highly conformal extension doping in advanced multi-gate devicesGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 8, 2015·3 cites·19 claims
- 3676US9054044B2Method for forming a semiconductor device and semiconductor device structuresGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 9, 2015·3 cites·6 claims
- 3776US8580643B2Threshold voltage adjustment in a Fin transistor by corner implantationBALDAUF TIM·Filed 2011·Granted Nov 12, 2013·4 cites·20 claims
- 3875US9324831B2Forming transistors without spacers and resulting devicesGLOBALFOUNDRIES INC·Filed 2014·Granted Apr 26, 2016·3 cites·14 claims
- 3975US8835255B2Method of forming a semiconductor structure including a vertical nanowireGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 16, 2014·4 cites·20 claims
- 4072US9431508B2Simplified gate-first HKMG manufacturing flowGLOBALFOUNDRIES INC·Filed 2013·Granted Aug 30, 2016·3 cites·24 claims
- 4172US8062952B2Strain transformation in biaxially strained SOI substrates for performance enhancement of P-channel and N-channel transistorsHOENTSCHEL JAN·Filed 2010·Granted Nov 22, 2011·3 cites·22 claims
- 4271US8753969B2Methods for fabricating MOS devices with stress memorizationFLACHOWSKY STEFAN·Filed 2012·Granted Jun 17, 2014·3 cites·7 claims
- 4370US10056376B2Ferroelectric FinFETGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 21, 2018·1 cites·19 claims
- 4469US9583240B2Temperature independent resistorGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 28, 2017·2 cites·13 claims
- 4569US9373720B2Three-dimensional transistor with improved channel mobilityGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 21, 2016·2 cites·18 claims
- 4669US9093554B2Methods of forming semiconductor devices with embedded semiconductor material as source/drain regions using a reduced number of spacersFLACHOWSKY STEFAN·Filed 2012·Granted Jul 28, 2015·2 cites·21 claims
- 4769US8679921B2Canyon gate transistor and methods for its fabricationFLACHOWSKY STEFAN·Filed 2011·Granted Mar 25, 2014·2 cites·20 claims
- 4868US9087587B2Integrated circuits and methods for operating integrated circuits with non-volatile memoryGLOBALFOUNDRIES INC·Filed 2013·Granted Jul 21, 2015·3 cites·18 claims
- 4968US8558290B2Semiconductor device with dual metal silicide regions and methods of making sameSCHEIPER THILO·Filed 2011·Granted Oct 15, 2013·2 cites·20 claims
- 5067US9257530B1Methods of making integrated circuits and components thereofGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 9, 2016·2 cites·20 claims
Showing the top 50 of 151 patent records by PatentIndex Score.
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