Inventor · disambiguated record
Suraj K. Patil
Also filed as: PATIL SURAJ K · PATIL Suraj · PATIL Suraj Kumar
25 granted patents·7 pending applications·97 citations·filing 2009–2018
94Inventor score
Top patents by PatentIndex Score
32 records- 0198US9698241B1Integrated circuits with replacement metal gates and methods for fabricating the sameGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 4, 2017·28 cites·16 claims
- 0295US9396995B1MOL contact metallization scheme for improved yield and device reliabilityGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 19, 2016·15 cites·17 claims
- 0392US10236358B1Integration of gate structures and spacers with air gapsGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 19, 2019·7 cites·20 claims
- 0492US10056303B1Integration scheme for gate height control and void free RMG fillGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 21, 2018·8 cites·10 claims
- 0589US9613855B1Methods of forming MIS contact structures on transistor devices in CMOS applicationsGLOBALFOUNDRIES INC·Filed 2016·Granted Apr 4, 2017·7 cites·32 claims
- 0688US9754843B1Heterogeneous integration of 3D Si and III-V vertical nanowire structures for mixed signal circuits fabricationGLOBALFOUNDRIES INC·Filed 2016·Granted Sep 5, 2017·4 cites·8 claims
- 0786US10573552B2Semiconductor device and method of fabricating the sameSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Feb 25, 2020·5 cites·11 claims
- 0886US10043708B2Structure and method for capping cobalt contactsGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 7, 2018·4 cites·14 claims
- 0985US8492238B2Method and apparatus for fabricating piezoresistive polysilicon by low-temperature metal induced crystallizationCELIK-BUTLER ZEYNEP·Filed 2009·Granted Jul 23, 2013·11 cites·18 claims
- 1076US9006016B2Method and apparatus for fabricating piezoresistive polysilicon by low-temperature metal induced crystallizationUNIV TEXAS·Filed 2013·Granted Apr 14, 2015·3 cites·31 claims
- 1174US10319642B2Heterogeneous integration of 3D SI and III-V vertical nanowire structures for mixed signal circuits fabricationGLOBALFOUNDRIES INC·Filed 2017·Granted Jun 11, 2019·1 cites·14 claims
- 1271US10056331B2Programmable via devices with metal/semiconductor via links and fabrication methods thereofGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 21, 2018·1 cites·17 claims
- 1365US9754903B2Semiconductor structure with anti-efuse deviceGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 5, 2017·1 cites·8 claims
- 1464US9564447B1Methods for fabricating programmable devices and related structuresGLOBALFOUNDRIES INC·Filed 2015·Granted Feb 7, 2017·1 cites·18 claims
- 1564US9195132B2Mask structures and methods of manufacturingGLOBALFOUNDRIES INC·Filed 2014·Granted Nov 24, 2015·1 cites·20 claims
- 1656US10354928B2Integration scheme for gate height control and void free RMG fillGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 16, 2019·0 cites·11 claims
- 1754US9831175B2Method, apparatus, and system for E-fuse in advanced CMOS technologiesGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 28, 2017·0 cites·20 claims
- 1852US9659862B1Method, apparatus, and system for e-fuse in advanced CMOS technologiesGLOBALFOUNDRIES INC·Filed 2015·Granted May 23, 2017·0 cites·20 claims
- 1950US9812393B2Programmable via devices with metal/semiconductor via links and fabrication methods thereofGLOBALFOUNDRIES INC·Filed 2015·Granted Nov 7, 2017·0 cites·16 claims
- 2050US2018277427A1Structure and method for capping cobalt contactsGLOBALFOUNDRIES INC·Filed 2018·Application pending·0 cites
- 2149US9570572B2Multiple layer interface formation for semiconductor structureGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 14, 2017·0 cites·11 claims
- 2245US9620381B2Facilitating etch processing of a thin film via partial implantation thereofGLOBALFOUNDRIES INC·Filed 2013·Granted Apr 11, 2017·0 cites·20 claims
- 2343US9691497B2Programmable devices with current-facilitated migration and fabrication methodsGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 27, 2017·0 cites·18 claims
- 2441US9502301B2Fabrication methods for multi-layer semiconductor structuresGLOBALFOUNDRIES INC·Filed 2015·Granted Nov 22, 2016·0 cites·18 claims
- 2538US2019131424A1Methods for forming ic structure having recessed gate spacers and related ic structuresGLOBALFOUNDRIES INC·Filed 2017·Application pending·0 cites
- 2637US9831123B2Methods of forming MIS contact structures on transistor devicesGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 28, 2017·0 cites·26 claims
- 2736US2019096679A1Gate stack processes and structuresGLOBALFOUNDRIES INC·Filed 2017·Application pending·0 cites
- 2836US2018130702A1Encapsulation of cobalt metallizationGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 2936US2018012791A1Interconnects with inner sacrificial spacersGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 3035US2017194245A1On-chip variable capacitor with geometric cross-sectionGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 3133US9588044B2Inline buried metal void detection by surface plasmon resonance (SPR)GLOBALFOUNDRIES INC·Filed 2015·Granted Mar 7, 2017·0 cites·20 claims
- 3233US2016351675A1Integrated circuits and methods for fabricating integrated circuits having replacement metal gate electrodesGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →