Inventor · disambiguated record
Theodore E. Fong
Also filed as: FONG THEODORE E
9 granted patents·3 pending applications·79 citations·filing 2016–2024
87Inventor score
Technology areasH10W
Files withSILICON GENESIS CORP12
Top patents by PatentIndex Score
12 records- 0196US11410984B1Three dimensional integrated circuit with lateral connection layerSILICON GENESIS CORP·Filed 2021·Granted Aug 9, 2022·9 cites·20 claims
- 0295US9704835B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2016·Granted Jul 11, 2017·32 cites·22 claims
- 0394US10573627B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2018·Granted Feb 25, 2020·14 cites·22 claims
- 0494US10049915B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2017·Granted Aug 14, 2018·21 cites·20 claims
- 0592US12176326B2Method of forming semiconductor device using high stress cleave planeSILICON GENESIS CORP·Filed 2023·Granted Dec 24, 2024·1 cites·20 claims
- 0685US10804252B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2020·Granted Oct 13, 2020·2 cites·20 claims
- 0774US2024145459A1Three dimensional integrated circuit with interconnect network layerSILICON GENESIS CORP·Filed 2024·Application pending·0 cites
- 0873US11901351B2Three dimensional integrated circuit with lateral connection layerSILICON GENESIS CORP·Filed 2022·Granted Feb 13, 2024·0 cites·20 claims
- 0972US11626392B2Method of forming semiconductor device using range compensating materialSILICON GENESIS CORP·Filed 2021·Granted Apr 11, 2023·0 cites·21 claims
- 1069US10923459B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2020·Granted Feb 16, 2021·0 cites·21 claims
- 1148US2018175008A1Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2018·Application pending·0 cites
- 1246US2017301657A1Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →