Inventor · disambiguated record
Thiago Hersan
Also filed as: HERSAN THIAGO
1 granted patent·1 pending application·1 citations·filing 2008–2010
17Inventor score
Technology areasG06F
Top patents by PatentIndex Score
2 records- 0156US7827516B1Method and system for grouping logic in an integrated circuit design to minimize number of transistors and number of unique geometry patternsPDF SOLUTIONS INC·Filed 2008·Granted Nov 2, 2010·1 cites·18 claims
- 0242US2011050281A1Method and system for grouping logic in an integrated circuit design to minimize number of transistors and number of unique geometry patternsMOE MATTHEW D·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →