Inventor · disambiguated record
Vijay Narayanan
Also filed as: NARAYANAN VIJAY · NARAYANAN VIJAY K · NARAYANAN VIJAY KRISHNA
258 granted patents·68 pending applications·2,689 citations·filing 2001–2025
99Inventor score
Top patents by PatentIndex Score
326 records- 0199US9997519B1Dual channel structures with multiple threshold voltagesIBM·Filed 2017·Granted Jun 12, 2018·102 cites·20 claims
- 0299US9748145B1Semiconductor devices with varying threshold voltage and fabrication methods thereofGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 29, 2017·494 cites·17 claims
- 0398US9793397B1Ferroelectric gate dielectric with scaled interfacial layer for steep sub-threshold slope field-effect transistorIBM·Filed 2016·Granted Oct 17, 2017·31 cites·16 claims
- 0498US7855105B1Planar and non-planar CMOS devices with multiple tuned threshold voltagesIBM·Filed 2009·Granted Dec 21, 2010·83 cites·14 claims
- 0598US7488656B2Removal of charged defects from metal oxide-gate stacksIBM·Filed 2005·Granted Feb 10, 2009·79 cites·10 claims
- 0697US9985206B1Resistive switching memory stack for three-dimensional structureIBM·Filed 2017·Granted May 29, 2018·16 cites·17 claims
- 0797US9362282B1High-K gate dielectric and metal gate conductor stack for planar field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor materialIBM·Filed 2015·Granted Jun 7, 2016·16 cites·11 claims
- 0897US7432567B2Metal gate CMOS with at least a single gate metal and dual gate dielectricsIBM·Filed 2005·Granted Oct 7, 2008·58 cites·13 claims
- 0997US7105889B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectricsIBM·Filed 2004·Granted Sep 12, 2006·93 cites·26 claims
- 1097US6921711B2Method for forming metal replacement gate of high performanceIBM·Filed 2003·Granted Jul 26, 2005·147 cites·25 claims
- 1196US9397199B1Methods of forming multi-Vt III-V TFET devicesGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 19, 2016·14 cites·1 claims
- 1296US7718496B2Techniques for enabling multiple Vt devices using high-K metal gate stacksIBM·Filed 2007·Granted May 18, 2010·32 cites·5 claims
- 1396US6982230B2Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structuresIBM·Filed 2002·Granted Jan 3, 2006·112 cites·14 claims
- 1495US9589851B2Dipole-based contact structure to reduce metal-semiconductor contact resistance in MOSFETsIBM·Filed 2015·Granted Mar 7, 2017·13 cites·15 claims
- 1595US8999831B2Method to improve reliability of replacement gate deviceIBM·Filed 2012·Granted Apr 7, 2015·11 cites·5 claims
- 1695US7696036B2CMOS transistors with differential oxygen content high-k dielectricsIBM·Filed 2007·Granted Apr 13, 2010·33 cites·7 claims
- 1794US12346884B2Mobile check depositU S BANK NAT ASSOCIATION·Filed 2025·Granted Jul 1, 2025·1 cites·20 claims
- 1894US12039504B1Mobile check depositU S BANK NAT ASSOCIATION·Filed 2023·Granted Jul 16, 2024·27 cites·19 claims
- 1994US10546787B2Multi-metal dipole doping to offer multi-threshold voltage pairs without channel doping for highly scaling CMOS deviceIBM·Filed 2018·Granted Jan 28, 2020·6 cites·11 claims
- 2094US9548381B1Method and structure for III-V nanowire tunnel FETsGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 17, 2017·11 cites·8 claims
- 2194US8941184B2Low threshold voltage CMOS deviceANDO TAKASHI·Filed 2011·Granted Jan 27, 2015·14 cites·9 claims
- 2294US8878298B2Multiple Vt field-effect transistor devicesCHANG JOSEPHINE B·Filed 2012·Granted Nov 4, 2014·17 cites·16 claims
- 2394US8420473B2Replacement gate devices with barrier metal for simultaneous processingANDO TAKASHI·Filed 2010·Granted Apr 16, 2013·18 cites·21 claims
- 2494US8212322B2Techniques for enabling multiple Vt devices using high-K metal gate stacksFRANK MARTIN M·Filed 2010·Granted Jul 3, 2012·16 cites·18 claims
- 2594US8110467B2Multiple Vt field-effect transistor devicesCHANG JOSEPHINE B·Filed 2009·Granted Feb 7, 2012·24 cites·11 claims
- 2694US7989902B2Scavenging metal stack for a high-k gate dielectricIBM·Filed 2009·Granted Aug 2, 2011·28 cites·25 claims
- 2794US7863126B2Fabrication of a CMOS structure with a high-k dielectric layer oxidizing an aluminum layer in PFET regionIBM·Filed 2008·Granted Jan 4, 2011·25 cites·10 claims
- 2894US7838908B2Semiconductor device having dual metal gates and method of manufactureIBM·Filed 2009·Granted Nov 23, 2010·28 cites·14 claims
- 2993US12265952B1Mobile check depositU S BANK NAT ASSOCIATION·Filed 2024·Granted Apr 1, 2025·2 cites·20 claims
- 3093US12229734B1Mobile check depositU S BANK NAT ASSOCIATION·Filed 2024·Granted Feb 18, 2025·3 cites·19 claims
- 3193US10529815B2Conformal replacement gate electrode for short channel devicesIBM·Filed 2017·Granted Jan 7, 2020·7 cites·14 claims
- 3293US9472643B2Method to improve reliability of replacement gate deviceIBM·Filed 2015·Granted Oct 18, 2016·6 cites·10 claims
- 3393US9105745B2Fabrication of low threshold voltage and inversion oxide thickness scaling for a high-k metal gate p-type MOSFETIBM·Filed 2012·Granted Aug 11, 2015·13 cites·10 claims
- 3493US8035173B2CMOS transistors with differential oxygen content high-K dielectricsIBM·Filed 2010·Granted Oct 11, 2011·14 cites·12 claims
- 3592US10615043B2Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor deviceIBM·Filed 2018·Granted Apr 7, 2020·4 cites·11 claims
- 3692US10529573B2Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor deviceIBM·Filed 2018·Granted Jan 7, 2020·4 cites·9 claims
- 3792US10062694B2Patterned gate dielectrics for III-V-based CMOS circuitsIBM·Filed 2017·Granted Aug 28, 2018·5 cites·12 claims
- 3892US9608066B1High-K spacer for extension-free CMOS devices with high mobility channel materialsIBM·Filed 2015·Granted Mar 28, 2017·8 cites·15 claims
- 3992US8741713B2Reliable physical unclonable function for device authenticationBRULEY JOHN·Filed 2012·Granted Jun 3, 2014·23 cites·23 claims
- 4092US8513099B2Epitaxial source/drain contacts self-aligned to gates for deposited FET channelsCHANG JOSEPHINE B·Filed 2010·Granted Aug 20, 2013·10 cites·11 claims
- 4192US8367496B2Scavanging metal stack for a high-k gate dielectricIBM·Filed 2011·Granted Feb 5, 2013·13 cites·20 claims
- 4292US7750418B2Introduction of metal impurity to change workfunction of conductive electrodesIBM·Filed 2008·Granted Jul 6, 2010·18 cites·31 claims
- 4392US7598545B2Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devicesIBM·Filed 2005·Granted Oct 6, 2009·20 cites·28 claims
- 4492US7569466B2Dual metal gate self-aligned integrationIBM·Filed 2005·Granted Aug 4, 2009·19 cites·10 claims
- 4592US7452767B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectricsIBM·Filed 2006·Granted Nov 18, 2008·15 cites·4 claims
- 4692US7446380B2Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOSIBM·Filed 2005·Granted Nov 4, 2008·20 cites·15 claims
- 4792US6852575B2Method of forming lattice-matched structure on silicon and structure formed therebyIBM·Filed 2001·Granted Feb 8, 2005·43 cites·47 claims
- 4891US10229856B2Dual channel CMOS having common gate stacksIBM·Filed 2017·Granted Mar 12, 2019·5 cites·7 claims
- 4991US8785995B2Ferroelectric semiconductor transistor devices having gate modulated conductive layerDUBOURDIEU CATHERINE A·Filed 2011·Granted Jul 22, 2014·17 cites·23 claims
- 5091US8304836B2Structure and method to obtain EOT scaled dielectric stacksJAGANNATHAN HEMANTH·Filed 2009·Granted Nov 6, 2012·10 cites·18 claims
Showing the top 50 of 326 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →