Inventor · disambiguated record
Vigyan Singhal
Also filed as: SINGHAL VIGYAN
14 granted patents·425 citations·filing 1998–2008
94Inventor score
Files withJASPER DESIGN AUTOMATION INC7CADENCE DESIGN SYSTEMS INC2JASPER DESIGN AUTOMATION2CORTADELLA JORDI1ELASTIX CORP1
Top patents by PatentIndex Score
14 records- 0190US7895552B1Extracting, visualizing, and acting on inconsistencies between a circuit design and its abstractionJASPER DESIGN AUTOMATION INC·Filed 2005·Granted Feb 22, 2011·30 cites·33 claims
- 0290US7159198B1System and method for identifying design efficiency and effectiveness parameters for verifying properties of a circuit modelJASPER DESIGN AUTOMATION·Filed 2003·Granted Jan 2, 2007·63 cites·66 claims
- 0389US8572539B2Variability-aware scheme for high-performance asynchronous circuit voltage regulationCORTADELLA JORDI·Filed 2008·Granted Oct 29, 2013·24 cites·13 claims
- 0487US7412674B1System and method for measuring progress for formal verification of a design using analysis regionJASPER DESIGN AUTOMATION·Filed 2005·Granted Aug 12, 2008·31 cites·22 claims
- 0586US7701255B2Variability-aware scheme for asynchronous circuit initializationELASTIX CORP·Filed 2008·Granted Apr 20, 2010·18 cites·9 claims
- 0682US7065726B1System and method for guiding and optimizing formal verification for a circuit designJASPER DESIGN AUTOMATION INC·Filed 2003·Granted Jun 20, 2006·36 cites·26 claims
- 0780US7647572B1Managing formal verification complexity of designs with multiple related countersJASPER DESIGN AUTOMATION INC·Filed 2007·Granted Jan 12, 2010·9 cites·24 claims
- 0879US7020856B2Method for verifying properties of a circuit modelJASPER DESIGN AUTOMATION INC·Filed 2003·Granted Mar 28, 2006·27 cites·25 claims
- 0979US6611947B1Method for determining the functional equivalence between two circuit models in a distributed computing environmentJASPER DESIGN AUTOMATION INC·Filed 2000·Granted Aug 26, 2003·37 cites·16 claims
- 1077US7418678B1Managing formal verification complexity of designs with countersJASPER DESIGN AUTOMATION INC·Filed 2004·Granted Aug 26, 2008·21 cites·29 claims
- 1177US7137078B2Trace based method for design navigationJASPER DESIGN AUTOMATION INC·Filed 2003·Granted Nov 14, 2006·30 cites·14 claims
- 1270US6993730B1Method for rapidly determining the functional equivalence between two circuit modelsTEMPUS FUGIT INC·Filed 2001·Granted Jan 31, 2006·25 cites·22 claims
- 1364US6308299B1Method and system for combinational verification having tight integration of verification techniquesCADENCE DESIGN SYSTEMS INC·Filed 1998·Granted Oct 23, 2001·48 cites·30 claims
- 1451US6247163B1Method and system of latch mapping for combinational equivalence checkingCADENCE DESIGN SYSTEMS INC·Filed 1998·Granted Jun 12, 2001·26 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →