Inventor · disambiguated record
Wingyu Leung
Also filed as: LEUNG WINGYU
98 granted patents·6 pending applications·7,198 citations·filing 1989–2016
99Inventor score
Top patents by PatentIndex Score
104 records- 0199US6754746B1Memory array with read/write methodsMONOLITHIC SYSTEM TECH INC·Filed 2000·Granted Jun 22, 2004·461 cites·2 claims
- 0298US5655113AResynchronization circuit for a memory system and method of operating sameMONOLITHIC SYSTEM TECH INC·Filed 1994·Granted Aug 5, 1997·299 cites·17 claims
- 0398US5485490AMethod and circuitry for clock synchronizationRAMBUS INC·Filed 1994·Granted Jan 16, 1996·433 cites·24 claims
- 0498US5254883AElectrical current source circuitry for a busRAMBUS INC·Filed 1992·Granted Oct 19, 1993·537 cites·39 claims
- 0598US5047979AHigh density SRAM circuit with ratio independent memory cellsINTEGRATED DEVICE TECH·Filed 1990·Granted Sep 10, 1991·344 cites·10 claims
- 0697US5829026AMethod and structure for implementing a cache memory using a DRAM arrayMONOLITHIC SYSTEM TECH INC·Filed 1997·Granted Oct 27, 1998·382 cites·47 claims
- 0797US5666480AFault-tolerant hierarchical bus system and method of operating sameMONOLITHIC SYSTEM TECH INC·Filed 1995·Granted Sep 9, 1997·183 cites·19 claims
- 0897US5432823AMethod and circuitry for minimizing clock-data skew in a bus systemRAMBUS INC·Filed 1994·Granted Jul 11, 1995·504 cites·22 claims
- 0996US7447104B2Word line driver for DRAM embedded in a logic processMOSYS INC·Filed 2006·Granted Nov 4, 2008·40 cites·12 claims
- 1096US6393504B1Dynamic address mapping and redundancy in a modular memory deviceMONOLITHIC SYSTEM TECH INC·Filed 2000·Granted May 21, 2002·113 cites·20 claims
- 1196US5999474AMethod and apparatus for complete hiding of the refresh of a semiconductor memoryMONOLITHIC SYSTEM TECH INC·Filed 1998·Granted Dec 7, 1999·141 cites·26 claims
- 1296US5498990AReduced CMOS-swing clamping circuit for bus linesMONOLITHIC SYSTEM TECH INC·Filed 1995·Granted Mar 12, 1996·184 cites·21 claims
- 1396US5265047AHigh density SRAM circuit with single-ended memory cellsMONOLITHIC SYSTEM TECHNOLOGY·Filed 1992·Granted Nov 23, 1993·289 cites·13 claims
- 1495US5784705AMethod and structure for performing pipeline burst accesses in a semiconductor memoryMOSYS INC·Filed 1996·Granted Jul 21, 1998·147 cites·28 claims
- 1594US7671401B2Non-volatile memory in CMOS logic processMOSYS INC·Filed 2005·Granted Mar 2, 2010·35 cites·20 claims
- 1694US7391647B2Non-volatile memory in CMOS logic process and method of operation thereofMOSYS INC·Filed 2006·Granted Jun 24, 2008·36 cites·22 claims
- 1794US6744676B2DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating sameMONOLITHIC SYSTEM TECH INC·Filed 2003·Granted Jun 1, 2004·71 cites·16 claims
- 1894US6468855B2Reduced topography DRAM cell fabricated using a modified logic process and method for operating sameMONOLITHIC SYSTEM TECH INC·Filed 2001·Granted Oct 22, 2002·66 cites·18 claims
- 1994US5843799ACircuit module redundancy architecture processMONOLITHIC SYSTEM TECH INC·Filed 1997·Granted Dec 1, 1998·138 cites·10 claims
- 2093US8391078B2Method and apparatus of operating a non-volatile DRAMLEUNG WINGYU·Filed 2010·Granted Mar 5, 2013·20 cites·116 claims
- 2193USRE38482EDelay stage circuitry for a ring oscillatorRAMBUS INC·Filed 2000·Granted Mar 30, 2004·57 cites·103 claims
- 2293US6442060B1High-density ratio-independent four-transistor RAM cell fabricated with a conventional logic processMONOLITHIC SYSTEM TECH INC·Filed 2000·Granted Aug 27, 2002·78 cites·30 claims
- 2393US6415353B1Read/write buffers for complete hiding of the refresh of a semiconductor memory and method of operating sameMONOLITHIC SYSTEM TECH INC·Filed 1999·Granted Jul 2, 2002·103 cites·21 claims
- 2493US6256248B1Method and apparatus for increasing the time available for internal refresh for 1-T SRAM compatible devicesMONOLITHIC SYSTEM TECH INC·Filed 2000·Granted Jul 3, 2001·67 cites·20 claims
- 2593US6215497B1Method and apparatus for maximizing the random access bandwidth of a multi-bank DRAM in a computer graphics systemMONOLITHIC SYSTEM TECH INC·Filed 1998·Granted Apr 10, 2001·151 cites·22 claims
- 2693US5831467ATermination circuit with power-down mode for use in circuit module architectureMONOLITHIC SYSTEM TECH INC·Filed 1996·Granted Nov 3, 1998·142 cites·19 claims
- 2793US5498886ACircuit module redundancy architectureMONOLITHIC SYSTEM TECH INC·Filed 1994·Granted Mar 12, 1996·135 cites·13 claims
- 2892US7533222B2Dual-port SRAM memory using single-port memory cellMOSYS INC·Filed 2006·Granted May 12, 2009·28 cites·21 claims
- 2992US6449685B1Read/write buffers for complete hiding of the refresh of a semiconductor memory and method of operating sameMONOLITHIC SYSTEM TECH INC·Filed 2001·Granted Sep 10, 2002·68 cites·16 claims
- 3092US6128700ASystem utilizing a DRAM array as a next level cache memory and method for operating sameMONOLITHIC SYSTEM TECH INC·Filed 1997·Granted Oct 3, 2000·69 cites·15 claims
- 3190US6573548B2DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating sameMONOLITHIC SYSTEM TECH INC·Filed 2001·Granted Jun 3, 2003·48 cites·9 claims
- 3290US6504780B2Method and apparatus for completely hiding refresh operations in a dram device using clock divisionMONOLITHIC SYSTEM TECH INC·Filed 2001·Granted Jan 7, 2003·53 cites·21 claims
- 3390US5923593AMulti-port DRAM cell and memory system using sameMONOLITHIC SYSTEMS INC·Filed 1996·Granted Jul 13, 1999·90 cites·15 claims
- 3489US7633810B2Non-volatile memory embedded in a conventional logic process and methods for operating sameMOSYS INC·Filed 2008·Granted Dec 15, 2009·14 cites·19 claims
- 3589US6898140B2Method and apparatus for temperature adaptive refresh in 1T-SRAM compatible memory using the subthreshold characteristics of MOSFET transistorsMONOLITHIC SYSTEM TECH INC·Filed 2002·Granted May 24, 2005·52 cites·24 claims
- 3688US6512691B2Non-volatile memory embedded in a conventional logic processMONOLITHIC SYSTEM TECH INC·Filed 2002·Granted Jan 28, 2003·39 cites·16 claims
- 3788US6028804AMethod and apparatus for 1-T SRAM compatible memoryMONOLITHIC SYSTEM TECH INC·Filed 1998·Granted Feb 22, 2000·67 cites·15 claims
- 3887US7392456B2Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memoryMOSYS INC·Filed 2004·Granted Jun 24, 2008·34 cites·9 claims
- 3987US7275200B2Transparent error correcting memory that supports partial-word writeMONOLITHIC SYSTEM TECH INC·Filed 2005·Granted Sep 25, 2007·16 cites·13 claims
- 4087US6496437B2Method and apparatus for forcing idle cycles to enable refresh operations in a semiconductor memoryMONOLITHIC SYSTEM TECH INC·Filed 2001·Granted Dec 17, 2002·44 cites·26 claims
- 4185US6370052B1Method and structure of ternary CAM cell in logic processMONOLITHIC SYSTEM TECH INC·Filed 2000·Granted Apr 9, 2002·40 cites·38 claims
- 4285US6075740AMethod and apparatus for increasing the time available for refresh for 1-t SRAM compatible devicesMONOLITHIC SYSTEM TECH INC·Filed 1998·Granted Jun 13, 2000·48 cites·26 claims
- 4385US5787267ACaching method and circuit for a memory system with circuit module architectureMONOLITHIC SYSTEM TECH INC·Filed 1995·Granted Jul 28, 1998·107 cites·24 claims
- 4484US6370073B2Single-port multi-bank memory system having read and write buffers and method of operating sameMONOLITHIC SYSTEM TECH INC·Filed 2001·Granted Apr 9, 2002·37 cites·46 claims
- 4584US6147914AOn-chip word line voltage generation for DRAM embedded in logic processMONOLITHIC SYSTEM TECH INC·Filed 1999·Granted Nov 14, 2000·56 cites·39 claims
- 4684US5799051ADelay stage circuitry for a ring oscillatorRAMBUS INC·Filed 1996·Granted Aug 25, 1998·44 cites·24 claims
- 4783US7353438B2Transparent error correcting memoryMOSYS INC·Filed 2003·Granted Apr 1, 2008·39 cites·22 claims
- 4882US7274618B2Word line driver for DRAM embedded in a logic processMONOLITHIC SYSTEM TECH INC·Filed 2005·Granted Sep 25, 2007·11 cites·19 claims
- 4982US7051264B2Error correcting memory and method of operating sameMONOLITHIC SYSTEM TECH INC·Filed 2001·Granted May 23, 2006·28 cites·19 claims
- 5082US6642098B2DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating sameMONOLITHIC SYSTEM TECH INC·Filed 2003·Granted Nov 4, 2003·25 cites·11 claims
Showing the top 50 of 104 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Wingyu Leung files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →