Inventor · disambiguated record
Wolfgang Sauter
Also filed as: SAUTER WOLFGANG · SAUTER WOLFGANG W
163 granted patents·23 pending applications·1,060 citations·filing 2003–2025
99Inventor score
Top patents by PatentIndex Score
186 records- 0198US7323780B2Electrical interconnection structure formationIBM·Filed 2005·Granted Jan 29, 2008·62 cites·11 claims
- 0297US10748852B1Multi-chip module (MCM) with chip-to-chip connection redundancy and methodMARVELL INT LTD·Filed 2019·Granted Aug 18, 2020·20 cites·20 claims
- 0396US9911708B2Conductive pillar shaped for solder confinementIBM·Filed 2017·Granted Mar 6, 2018·9 cites·20 claims
- 0496US8742594B2Structure and method of making an offset-trench crackstop that forms an air gap adjacent to a passivated metal crackstopDAUBENSPECK TIMOTHY H·Filed 2012·Granted Jun 3, 2014·30 cites·15 claims
- 0596US8508043B2Metal pad structure for thickness enhancement of polymer used in electrical interconnection of semiconductor die to semiconductor chip package substrate with solder bumpDAUBENSPECK TIMOTHY H·Filed 2011·Granted Aug 13, 2013·24 cites·19 claims
- 0696US7825511B2Undercut-free BLM process for Pb-free and Pb-reduced C4IBM·Filed 2009·Granted Nov 2, 2010·37 cites·7 claims
- 0795US9679806B1Nanowires for pillar interconnectsIBM·Filed 2016·Granted Jun 13, 2017·11 cites·7 claims
- 0895US9583451B2Conductive pillar shaped for solder confinementIBM·Filed 2015·Granted Feb 28, 2017·8 cites·19 claims
- 0995US7482675B2Probing pads in kerf area for wafer testingIBM·Filed 2005·Granted Jan 27, 2009·40 cites·8 claims
- 1094US7459785B2Electrical interconnection structure formationIBM·Filed 2007·Granted Dec 2, 2008·28 cites·10 claims
- 1193US8298930B2Undercut-repair of barrier layer metallurgy for solder bumps and methods thereofARVIN CHARLES L·Filed 2010·Granted Oct 30, 2012·16 cites·19 claims
- 1293US7265433B2On-pad broadband matching networkIBM·Filed 2005·Granted Sep 4, 2007·32 cites·17 claims
- 1393US7250311B2Wirebond crack sensor for low-k dieIBM·Filed 2005·Granted Jul 31, 2007·31 cites·14 claims
- 1492US10600751B2Conductive pillar shaped for solder confinementIBM·Filed 2019·Granted Mar 24, 2020·4 cites·20 claims
- 1592US8680689B1Coplanar waveguide for stacked multi-chip systemsIBM·Filed 2012·Granted Mar 25, 2014·10 cites·20 claims
- 1691US9741682B2Structures to enable a full intermetallic interconnectIBM·Filed 2015·Granted Aug 22, 2017·6 cites·6 claims
- 1791US7716992B2Sensor, method, and design structure for a low-k delamination sensorIBM·Filed 2008·Granted May 18, 2010·16 cites·19 claims
- 1891US7485564B2Undercut-free BLM process for Pb-free and Pb-reduced C4IBM·Filed 2007·Granted Feb 3, 2009·20 cites·20 claims
- 1991US7348210B2Post bump passivation for soft error protectionIBM·Filed 2005·Granted Mar 25, 2008·25 cites·5 claims
- 2091US7329951B2Solder bumps in flip-chip technologiesIBM·Filed 2005·Granted Feb 12, 2008·20 cites·1 claims
- 2190US7439170B1Design structure for final via designs for chip stress reductionIBM·Filed 2008·Granted Oct 21, 2008·16 cites·1 claims
- 2289US9059106B2Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chipIBM·Filed 2012·Granted Jun 16, 2015·9 cites·18 claims
- 2389US8637392B2Solder interconnect with non-wettable sidewall pillars and methods of manufactureARVIN CHARLES L·Filed 2010·Granted Jan 28, 2014·9 cites·23 claims
- 2489US8350383B2IC chip package having IC chip with overhang and/or BGA blocking underfill material flow and related methodsIBM·Filed 2009·Granted Jan 8, 2013·16 cites·19 claims
- 2589US7985671B2Structures and methods for improving solder bump connections in semiconductor devicesIBM·Filed 2008·Granted Jul 26, 2011·18 cites·22 claims
- 2689US7316940B2Chip dicingIBM·Filed 2006·Granted Jan 8, 2008·12 cites·10 claims
- 2788US8476762B2Ni plating of a BLM edge for Pb-free C4 undercut controlDAUBENSPECK TIMOTHY H·Filed 2012·Granted Jul 2, 2013·8 cites·16 claims
- 2888US8198133B2Structures and methods to improve lead-free C4 interconnect reliabilityDAUBENSPECK TIMOTHY H·Filed 2009·Granted Jun 12, 2012·16 cites·12 claims
- 2988US7541272B2Damascene patterning of barrier layer metal for C4 solder bumpsIBM·Filed 2007·Granted Jun 2, 2009·14 cites·11 claims
- 3087US10790253B2Conductive pillar shaped for solder confinementIBM·Filed 2019·Granted Sep 29, 2020·2 cites·20 claims
- 3187US8361598B2Substrate anchor structure and methodIBM·Filed 2011·Granted Jan 29, 2013·8 cites·12 claims
- 3286US9798088B2Barrier structures for underfill blockout regionsGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 24, 2017·5 cites·15 claims
- 3386US7859122B2Final via structures for bond pad-solder ball interconnectionsIBM·Filed 2008·Granted Dec 28, 2010·14 cites·14 claims
- 3486US7635643B2Method for forming C4 connections on integrated circuit chips and the resulting devicesIBM·Filed 2006·Granted Dec 22, 2009·14 cites·20 claims
- 3586US7256503B2Chip underfill in flip-chip technologiesIBM·Filed 2006·Granted Aug 14, 2007·14 cites·20 claims
- 3685US9159696B2Plug via formation by patterned plating and polishingIBM·Filed 2013·Granted Oct 13, 2015·6 cites·20 claims
- 3785US7176583B2Damascene patterning of barrier layer metal for C4 solder bumpsIBM·Filed 2004·Granted Feb 13, 2007·35 cites·10 claims
- 3884US10290599B2Conductive pillar shaped for solder confinementIBM·Filed 2017·Granted May 14, 2019·2 cites·10 claims
- 3984US8138099B1Chip package solder interconnect formed by surface tensionDAUBENSPECK TIMOTHY H·Filed 2010·Granted Mar 20, 2012·7 cites·20 claims
- 4083US9466547B1Passivation layer topographyGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 11, 2016·4 cites·17 claims
- 4183US8927334B2Overcoming chip warping to enhance wetting of solder bumps and flip chip attaches in a flip chip packageIBM·Filed 2012·Granted Jan 6, 2015·7 cites·8 claims
- 4283US8492892B2Solder bump connectionsDAUBENSPECK TIMOTHY H·Filed 2010·Granted Jul 23, 2013·6 cites·19 claims
- 4383US8159067B2Underfill flow guide structuresDAUBENSPECK TIMOTHY H·Filed 2008·Granted Apr 17, 2012·8 cites·11 claims
- 4483US7935408B2Substrate anchor structure and methodIBM·Filed 2007·Granted May 3, 2011·10 cites·12 claims
- 4583US7601628B2Wire and solder bond forming methodsIBM·Filed 2006·Granted Oct 13, 2009·11 cites·20 claims
- 4683US7462509B2Dual-sided chip attached modulesIBM·Filed 2006·Granted Dec 9, 2008·10 cites·12 claims
- 4783US7405139B2Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etchIBM·Filed 2006·Granted Jul 29, 2008·9 cites·5 claims
- 4882US8937009B2Far back end of the line metallization method and structuresIBM·Filed 2013·Granted Jan 20, 2015·6 cites·18 claims
- 4982US8933540B2Thermal via for 3D integrated circuits structuresIBM·Filed 2013·Granted Jan 13, 2015·6 cites·9 claims
- 5082US8415260B2Chip identification for organic laminate packaging and methods of manufactureBANACH ALBERT J·Filed 2010·Granted Apr 9, 2013·8 cites·3 claims
Showing the top 50 of 186 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →