Inventor · disambiguated record
Yeong-Jyh Lin
Also filed as: LIN YEONG-JYH
55 granted patents·10 pending applications·165 citations·filing 2006–2025
98Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD54CHIPMOS TECHNOLOGIES INC3TAIWAN SEMICONDUCTOR MFG3CHIPMOS TECHNOLOGIES BERMUDA1HWANG CHIEN LING1
Top patents by PatentIndex Score
65 records- 0198US11189515B2Method for alignment, process tool and method for wafer-level alignmentTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 30, 2021·5 cites·20 claims
- 0297US11862612B23D trench capacitor for integrated passive devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jan 2, 2024·4 cites·20 claims
- 0397US11211362B23D trench capacitor for integrated passive devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 28, 2021·6 cites·20 claims
- 0497US9834435B1Structure and formation method of semiconductor device structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 5, 2017·20 cites·20 claims
- 0597US9093337B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jul 28, 2015·27 cites·20 claims
- 0695US10157881B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 18, 2018·9 cites·20 claims
- 0794US11916022B2Photolithography alignment process for bonded wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Feb 27, 2024·2 cites·20 claims
- 0891US9484226B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 1, 2016·5 cites·20 claims
- 0991US2025357123A1Apparatus and method for wafer bondingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1090US10510712B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 17, 2019·3 cites·20 claims
- 1190US10056285B2Semiconductor wafer device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 21, 2018·4 cites·20 claims
- 1288US7781878B2Zigzag-stacked package structureCHIPMOS TECHNOLOGIES INC·Filed 2008·Granted Aug 24, 2010·16 cites·10 claims
- 1387US11925033B2Embedded backside memory on a field effect transistorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Mar 5, 2024·1 cites·20 claims
- 1487US9768142B2Mechanisms for forming bonding structuresTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Sep 19, 2017·7 cites·20 claims
- 1586US10636688B2Method for alignment, process tool and method for wafer-level alignmentTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 28, 2020·3 cites·20 claims
- 1686US8951037B2Wafer-level underfill and over-moldingJANG BOR-PING·Filed 2012·Granted Feb 10, 2015·5 cites·20 claims
- 1785US9425179B2Chip packages and methods of manufacture thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 23, 2016·5 cites·20 claims
- 1885US7554197B2High frequency IC package and method for fabricating the sameCHIPMOS TECHNOLOGIES BERMUDA·Filed 2006·Granted Jun 30, 2009·14 cites·12 claims
- 1984US2025273632A13d trench capacitor for integrated passive devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2083US12334475B23D trench capacitor for integrated passive devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jun 17, 2025·0 cites·20 claims
- 2183US12289979B2Deposition system for high accuracy patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Apr 29, 2025·0 cites·20 claims
- 2282US12230585B2Photolithography alignment process for bonded wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Feb 18, 2025·0 cites·20 claims
- 2382US9659891B2Semiconductor device having a boundary structure, a package on package structure, and a method of makingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted May 23, 2017·4 cites·20 claims
- 2482US8540136B1Methods for stud bump formation and apparatus for performing the sameLIN YEONG-JYH·Filed 2012·Granted Sep 24, 2013·6 cites·19 claims
- 2581US12213323B2Embedded backside memory on a field effect transistorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jan 28, 2025·0 cites·20 claims
- 2680US2024381667A1Embedded backside memory on a field effect transistorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2779US12444607B2Apparatus and method for wafer bondingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Oct 14, 2025·0 cites·20 claims
- 2879US2025230536A1Deposition system for high accuracy patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2978US9418953B2Packaging through pre-formed metal pinsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 16, 2016·3 cites·20 claims
- 3077US12500206B2Mechanical wafer alignment detection for bonding processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 16, 2025·0 cites·20 claims
- 3177US11390000B2Wafer level transfer molding and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jul 19, 2022·0 cites·20 claims
- 3277US9893044B2Wafer-level underfill and over-moldingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Feb 13, 2018·1 cites·20 claims
- 3376US10147693B2Methods for stud bump formationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Dec 4, 2018·2 cites·20 claims
- 3474US9498851B2Methods for forming apparatus for stud bump formationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Nov 22, 2016·2 cites·20 claims
- 3573US9812346B2Semiconductor wafer device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 7, 2017·1 cites·20 claims
- 3673US9583365B2Method of forming interconnects for three dimensional integrated circuitYU CHUN HUI·Filed 2012·Granted Feb 28, 2017·4 cites·18 claims
- 3771US11348790B2Apparatus and method for wafer bondingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted May 31, 2022·0 cites·20 claims
- 3871US10276531B2Semiconductor device having a boundary structure, a package on package structure, and a method of makingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 30, 2019·1 cites·20 claims
- 3971US2025157943A1Photolithography alignment process for bonded wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 4070US11688717B2Mechanical wafer alignment detection for bonding processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jun 27, 2023·0 cites·20 claims
- 4170US9021682B2Apparatus for stud bump formationHWANG CHIEN LING·Filed 2012·Granted May 5, 2015·2 cites·19 claims
- 4269US10513070B2Wafer level transfer molding and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 24, 2019·0 cites·17 claims
- 4368US11818944B2Deposition system for high accuracy patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 14, 2023·0 cites·20 claims
- 4468US10985135B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Apr 20, 2021·0 cites·20 claims
- 4566US7642639B2COB type IC package to enhanced bondibility of bumps embedded in substrate and method for fabricating the sameCHIPMOS TECHNOLOGIES INC·Filed 2006·Granted Jan 5, 2010·3 cites·24 claims
- 4663US10770331B2Semiconductor wafer device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Sep 8, 2020·0 cites·20 claims
- 4763US9802349B2Wafer level transfer molding and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 31, 2017·0 cites·19 claims
- 4862US11233032B2Mechanisms for forming bonding structuresTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jan 25, 2022·0 cites·20 claims
- 4961US10804234B2Semiconductor device having a boundary structure, a package on package structure, and a method of makingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Oct 13, 2020·0 cites·20 claims
- 5060US11127725B2Semiconductor structure and associated manufacturing methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Sep 21, 2021·0 cites·20 claims
Showing the top 50 of 65 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →