Method of making a graphene base transistor with reduced collector area

Abstract

A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region wherein the base region comprises one or more sheets of graphene and wherein the base region is intermediate the electron injection region and the electron collection region and forms electrical interfaces therewith.

What we claim is: 
     
       1. A product of a process of making a graphene base transistor with reduced collector area comprising:
 forming a graphene material layer with a right and left lateral side portion over the top of a third region right and left side material; 
 forming a collector material on a substrate; 
 depositing a dielectric in the third region right and left side material; 
 planarizing the dielectric in the third region right and left side material; 
 cleaning and removing the native oxide on the top surface of the collector material; 
 transferring a base graphene material layer to the top surface of the graphene material layer; 
 bonding the base graphene material layer; and 
 photostepping and defining a second graphene material layer to the top surface of the graphene material layer. 
 
     
     
       2. The product of the process of making a graphene base transistor with reduced collector area of  claim 1  wherein the graphene is doped and wherein said doping increases the graphene to semiconductor heterojunction harrier height and lowers the base resistance. 
     
     
       3. The product of the process of making a graphene base transistor with reduced collector area of  claim 2  further comprising the step of:
 depositing a material protection layer on the surface of the collector material.