Josephson junction with spacer

Abstract

Various embodiments are directed toward a circuit configured to act as a Josephson junction. The circuit includes: a junction stack on a substrate, the junction stack including a portion of a first superconductor electrode, with an interface layer on a top side of the first superconductor electrode and configured to act as a tunneling barrier for the junction stack. The circuit may also comprise a first portion of a second superconductor electrode on top of the interface layer. A spacer may separate the portion of the first superconductor electrode in the junction stack from a second portion of the second superconductor electrode outside the junction stack where the second superconductor electrode overlays the first superconductor electrode, the second portion of the second superconductor electrode contacting the substrate on at least one side of the spacer.

What is claimed is: 
     
       1. A circuit configured to act as a Josephson junction, comprising:
 a junction stack on a substrate, the junction stack including:
 a portion of a first superconductor electrode; 
 an interface layer on a top side of the first superconductor electrode and configured to act as a tunneling barrier for the junction stack; 
 a first portion of a second superconductor electrode on top of the interface layer; and 
 
 a spacer separating the portion of the first superconductor electrode from a second portion of the second superconductor electrode that is outside the junction stack, the second portion of the second superconductor electrode contacting the substrate on at least two sides of the spacer. 
 
     
     
       2. The circuit of  claim 1 , wherein the spacer separates the portion of the first superconductor electrode from the second portion of the second superconductor electrode along a line parallel to a major surface of the substrate. 
     
     
       3. The circuit of  claim 1 , wherein a top side of the spacer is above the interface layer. 
     
     
       4. The circuit of  claim 1 , wherein the first superconductor electrode and the second superconductor electrode are made from a superconductor material selected from the group consisting of niobium, lead, aluminum, indium, lanthanum, rhenium, tin, tantalum, and vanadium. 
     
     
       5. The circuit of  claim 1 , wherein the spacer is made from a spacer material selected from the group consisting of silicon dioxide (SiO 2 ), silicon nitride (SiN), SiBCN, and SiCOH. 
     
     
       6. The circuit of  claim 1 , wherein the interface layer is made from an interface metal selected from the group consisting of silver, cobalt, nickel, nickel-iron, cadmium, aluminum, and lead. 
     
     
       7. The circuit of  claim 6 , wherein the interface layer includes an oxide of the interface metal on top of the interface metal and in touching the first portion of the second superconductor electrode. 
     
     
       8. The circuit of  claim 7 , wherein the oxide has a controlled thickness. 
     
     
       9. The circuit of  claim 1 , wherein the interface layer is made from a non-superconductor metal. 
     
     
       10. The circuit of  claim 1 , wherein:
 the first superconductor electrode has a first pad area and a first extension; 
 the second superconductor electrode has a second pad area and a second extension; 
 the portion of the first superconductor electrode is part of the first extension; and 
 the second portion of the second superconductor electrode is part of the second extension. 
 
     
     
       11. The circuit of  claim 10 , wherein the first pad area and the second pad area are configured to join with contacts created in an integrated circuit. 
     
     
       12. The circuit of  claim 1 , wherein an extension area of the first superconductor electrode is overlaid by an extension area of the second superconductor electrode. 
     
     
       13. The circuit of  claim 1 , wherein the circuit is further configured to store and handle quantum bits. 
     
     
       14. The circuit of  claim 1 , wherein the spacer is made from a nonconductive material. 
     
     
       15. The circuit of  claim 14 , wherein the spacer can block electrical current from flowing between the first superconductor electrode and second superconductor electrode. 
     
     
       16. The circuit of  claim 1 , wherein the spacer conforms to a perimeter of the portion of the first superconductor electrode. 
     
     
       17. The circuit of  claim 16 , wherein a width of the spacer is the same on all sides of the portion of the first superconductor electrode. 
     
     
       18. The circuit of  claim 1 , wherein the first superconductor electrode and the second superconductor electrode are made from a superconductor material which is superconducting only when cooled below a critical temperature of the superconductor material. 
     
     
       19. The circuit of  claim 1 , wherein the first superconductor electrode is made from a first superconductor material and the second superconductor electrode is made from a second superconductor material and the second superconductor material is not the same as the first superconductor material. 
     
     
       20. The circuit of  claim 1 , wherein the circuit is configured to act as a superconductor-insulator-superconductor (S-I-S) Josephson junction.