Resistive memory transition monitoring

Abstract

A method for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines. The method includes determining, by a current determining circuit, a cell current and a cell current change rate of at least one of the cells; determining, by a control circuit, whether the cell current change rate is outside of a cell current change rate predefined range; performing, by the control circuit, a predetermined action if the control circuit determination is positive; and storing, in a memory, the determined cell current at predetermined times, and to store the determined cell current change rate.

What is claimed is: 
     
       1. A method for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines, the method comprising:
 determining, by a current determining circuit, a cell current and a cell current change rate of at least one of the cells; 
 determining, by a control circuit, whether the cell current change rate is outside of a cell current change rate predefined range; 
 performing, by the control circuit, a predetermined action if the control circuit determination is positive; and 
 storing, in a memory, the determined cell current at predetermined times, and to store the determined cell current change rate. 
 
     
     
       2. The method of  claim 1 , wherein the predetermined action is a dynamic adjustment of a bitline voltage and/or a wordline voltage of the at least one cell, performed during a cell resistance transition sequence of the at least one cell. 
     
     
       3. The method of  claim 1 , further comprising:
 determining, by the current determining circuit, a cell current and a cell current change rate of a plurality of the cells; 
 determining, by the control circuit, whether the cell current change rate of any of the plurality of cells is outside of the cell current change rate predefined range; and 
 performing, by the control circuit, the predetermined action if the control circuit determination is positive for any of the cells. 
 
     
     
       4. The method of  claim 3 , wherein each of the plurality of cells has an individual cell current change rate predefined range. 
     
     
       5. The method of  claim 3 , further comprising:
 determining, by the current determining circuit, the cell current and the cell current change rate of the plurality of cells sequentially. 
 
     
     
       6. The method of  claim 1 , further comprising:
 determining, by the current determining circuit, the cell current and the cell current change rate of a plurality of cells simultaneously; 
 determining, by the control circuit, whether a median of the cell current change rate of the plurality of cells is outside of a median cell current change rate predefined range; and 
 performing, by the control circuit, a predetermined action if the control circuit determination is positive. 
 
     
     
       7. The method of  claim 1 , wherein the predetermined action is stopping a cell resistance transition sequence of the at least one cell. 
     
     
       8. The method of  claim 1 , wherein the cell current change rate predefined range is based on a compliance setting of the cell current or of the cell current change rate. 
     
     
       9. The method of  claim 1 , further comprising:
 ramping, by the control circuit, a wordline voltage and/or a bitline voltage of the at least one cell until a predetermined cell current change rate is reached. 
 
     
     
       10. The method of  claim 1 , wherein the predetermined action is replacing the at least one cell with a redundant cell. 
     
     
       11. The method of  claim 1 , further comprising:
 determining, by the current determining circuit, the cell current and the cell current change rate during a cell resistance transition sequence of the at least one cell. 
 
     
     
       12. The method of  claim 11 , wherein the cell resistance transition sequence is a set operation, a reset operation, and/or a forming operation of the at least one cell. 
     
     
       13. The method of  claim 1 , wherein the determining, by the current determining circuit, the cell current and the cell current change rate of at least one of the cells, comprises:
 generating, by a reference voltage generation circuit, a sweep of reference voltages at periodic times; and 
 comparing, by a comparator, a shunt voltage, which is between the at least one cell and ground, with the sweep of reference voltages at the periodic times until the shunt voltage crosses the sweep of reference voltages to determine the shunt voltage. 
 
     
     
       14. The method of  claim 13 , further comprising:
 determining, by a differentiator, the shunt voltage change rate; and 
 determining, by the control circuit, the cell current and the cell current change rate based on the shunt voltage and the shunt voltage change rate. 
 
     
     
       15. The method of  claim 13 , further comprising:
 storing, by the memory, the shunt voltages and the corresponding periodic times; and 
 determining, by the control circuit, the cell current change rate based on the stored shunt voltages and the corresponding periodic times. 
 
     
     
       16. The method of  claim 13 , further comprising:
 determining the sweep of reference voltages dynamically determined based on an initial shunt voltage. 
 
     
     
       17. The method of  claim 1 , wherein the determining, by the current determining circuit, the cell current and the cell current change rate of at least one of the cells, comprises:
 comparing, by a plurality of comparators, a shunt voltage, which is between the at least one cell and ground, with respective reference voltages to determine the shunt voltage; 
 determining, by a differentiator, the shunt voltage change rate; and 
 determining, by the control circuit, the cell current and the cell current change rate based on the shunt voltage and the shunt voltage change rate. 
 
     
     
       18. A method for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines, the method comprising:
 determining, by a current determining circuit, a cell current and a cell current change rate of at least one of the cells; 
 determining, by a control circuit, whether the cell current change rate is outside of a cell current change rate predefined range; and 
 performing, by the control circuit, a predetermined action if the control circuit determination is positive, 
 wherein the predetermined action is a static adjustment of a bitline voltage and/or a wordline voltage of the at least one cell, performed between cell resistance transition sequences. 
 
     
     
       19. A method for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines, the method comprising:
 determining, by a current determining circuit, a cell current and a cell current change rate of at least one of the cells; 
 determining, by a control circuit, whether the cell current change rate is outside of a cell current change rate predefined range; and 
 performing, by the control circuit, a predetermined action if the control circuit determination is positive, 
 wherein the predetermined action is replacing the at least one cell with a redundant cell.