Short circuit detecting device of stacked memory chips and method thereof

Abstract

Disclosed are a method and a device for detecting a short circuit between adjacent micro-bumps. The method includes setting outputs of a pull-up driver and a pull-down driver of a data output circuit connected with a micro-bump to be suitable for a test type and determining whether a short circuit is generated.

What is claimed is: 
     
       1. A micro-bump short circuit detecting method of a semiconductor chip, the method comprising:
 supplying, by a micro-bump short circuit detecting circuit, a micro-bump short circuit test signal to the semiconductor chip, the semiconductor chip including a plurality of micro-bumps; 
 setting, by the micro-bump short circuit detecting circuit, outputs of a pull-up driver and a pull-down driver of each of a plurality of data output circuits included in the micro-bump short circuit detecting circuit to one of an off state, a weak-on state, and a strong-on state based on a micro-bump short circuit test type; 
 storing, by the micro-bump short circuit detecting circuit, test input in a test input data storage circuit included in the micro-bump short circuit detecting circuit; 
 driving, by the micro-bump short circuit detecting circuit, one or more of the plurality of data output circuits; 
 storing, by the micro-bump short circuit detecting circuit, an output of each of the plurality of data output circuits in a test output data storage circuit included in the micro-bump short circuit detecting circuit; 
 outputting, by the micro-bump short circuit detecting circuit, test output stored in the test output data storage circuit included in the micro-bump short circuit detecting circuit; and 
 detecting, by a testing apparatus, a micro-bump short circuit based on the test input in the test input data storage circuit and the test output in the test output data storage circuit. 
 
     
     
       2. The method of  claim 1 , wherein the micro-bump short circuit test type comprises at least one of
 (i) an operation of testing a short circuit between one of the plurality of micro-bumps and a ground voltage, 
 (ii) an operation of testing a short circuit between one of the plurality of micro-bumps and a power supply voltage, and 
 (iii) an operation of testing a short circuit between adjacent one of the plurality of micro-bumps. 
 
     
     
       3. The method of  claim 2 , wherein if the micro-bump short circuit test type is the operation of testing the short circuit between the one of the plurality of micro-bumps and the ground voltage, the method further comprises:
 setting an output of the pull-up driver of each of the plurality of data output circuits to the weak-on state; and 
 setting an output of the pull-down driver of each of the plurality of data output circuits to the off state. 
 
     
     
       4. The method of  claim 2 , wherein if the micro-bump short circuit test type is the operation of testing the short circuit between the one of the plurality of micro-bumps and the power supply voltage, the method further comprises:
 setting an output of the pull-up driver of each of the plurality of data output circuits to the off state, and 
 setting an output of the pull-down driver of each of the plurality of data output circuits to the weak-on state. 
 
     
     
       5. The method of  claim 2 , wherein if the micro-bump short circuit test type is the operation of testing the short circuit between the adjacent ones of the plurality of micro-bumps, the method further comprises:
 setting an output of the pull-up driver connected to a micro-bump corresponding to a short circuit test target to the weak-on state; 
 setting an output of the pull-down driver connected to the micro-bump corresponding to the short circuit test target to the off state; 
 setting an output of the pull-up driver connected to a micro-bump adjacent to the micro-bump corresponding to the short circuit test target to the off state; and 
 setting an output of the pull-down driver connected to the micro-bump adjacent to the micro-bump corresponding to the short circuit test target to the strong-on state. 
 
     
     
       6. The method of  claim 2 , wherein if the micro-bump short circuit test type is the operation of testing the short circuit between the adjacent ones of the plurality of micro-bumps, the method further comprises:
 setting an output of the pull-up driver connected to a micro-bump corresponding to a short circuit test target to the off state; 
 setting an output of the pull-down driver connected to the micro-bump corresponding to the short circuit test target to the weak-on state; 
 setting an output of the pull-up driver connected to a micro-bump adjacent to the micro-bump corresponding to the short circuit test target to the strong-on state; and 
 setting an output of the pull-down driver connected to the micro-bump adjacent to the micro-bump corresponding to the short circuit test target to the weak-on state. 
 
     
     
       7. The method of  claim 1 , wherein
 the pull-up driver of each of the plurality of data output circuits include a pull-up control circuit and a pull-up drive device, and 
 the pull-down driver of each of the plurality of data output circuits include a pull-down control circuit and a pull-down drive circuit. 
 
     
     
       8. The method of  claim 7 , wherein
 the pull-up control circuit includes PMOS transistors, and 
 the pull-down drive circuit includes NMOS transistors. 
 
     
     
       9. The method of  claim 7 , further comprising:
 setting an output of the pull-up driver or the pull-down drive of each of the plurality of data output circuits to the off state by turning off all transistors of the pull-up control circuit or the pull-down control circuit, 
 setting an output of the pull-up driver or the pull-down drive of each of the plurality of data output circuits to the weak-on state by turning on some of transistors of the pull-up control circuit or the pull-down control circuit, 
 setting an output of the pull-up drive or the pull-down driver of each of the plurality of data output circuits to the strong-on state by turning on all transistors of the pull-up control circuit or the pull-down control circuit. 
 
     
     
       10. The method of  claim 1 , wherein the storing the test input comprises:
 sequentially receiving test input data by a first register of an m-stage shift register of the test input data storage circuit during m clock cycles, and 
 shifting the test input data stored in the first register into a next register of the m-stage shift register every rising transition of a clock signal, where “m” indicates a number of the plurality of micro-bumps of the semiconductor chip to be tested to detect the micro-bump short circuit. 
 
     
     
       11. The method of  claim 10 , wherein the plurality of data output circuits are configured to receive outputs of corresponding ones of the m-stage shift register. 
     
     
       12. The method of  claim 11 , wherein the plurality of data output circuits are configured to output signals to corresponding registers in the test output data storage circuit. 
     
     
       13. The method of  claim 1 , wherein the storing an output comprises:
 sequentially outputting test output data to an m-th register of an m-stage shift register of the test output data storage circuit during m clock cycles; and 
 shifting the test output data stored in the m-th register into a next register of the m-stage shift register every rising transition of a clock signal, where “m” is a number of the plurality of micro-bumps of the semiconductor chip to be tested to detect the micro-bump short circuit. 
 
     
     
       14. The method of  claim 1 , wherein the detecting comprises:
 detecting that a short circuit is not present at one of the plurality of micro-bumps connected to a corresponding output driver when the test output is same as the test input, and 
 detecting that the short circuit is present at one of the plurality of micro-bumps connected to the corresponding output driver when the test output differs from the test input. 
 
     
     
       15. The method of  claim 14 , further comprising:
 determining a location of a register of an output shift register storing a corresponding test output, if the detecting the micro-bump short circuit detects that the short circuit is present.