Systems, apparatuses, and methods for controllable sine and/or cosine operations

Abstract

Embodiments of systems, apparatuses, and methods for performing vector-packed controllable sine and/or cosine operations in a processor are described. For example, execution circuitry executes a decoded instruction to compute at least a real output value and an imaginary output value based on at least a cosine calculation and a sine calculation, the cosine and sine calculations each based on an index value from a packed data source operand, add the index value with an index increment value from the packed data source operand to create an updated index value, and store the real output value, the imaginary output value, and the updated index value to a packed data destination operand.

What is claimed is: 
     
       1. A processor comprising:
 a decoder to decode a single instruction comprising:
 a first operand to identify an index value, and an increment value; 
 a second operand to identify a destination which is to store an output; and 
 an immediate value; and 
 
 execution circuitry coupled to the decoder, the execution circuitry to execute the decoded single instruction, comprising the execution circuitry to:
 perform an access of a lookup table based on the index value, wherein the lookup table comprises entries which each correspond to a different respective angle, wherein respective values of the entries each indicate a cosine of the corresponding angle; 
 calculate a first component of the output and a second component of the output each based on both the access and the immediate value; 
 store the first component and the second component to respective locations of the destination, wherein the respective locations are selected based on first bits of the immediate value; 
 calculate an updated index value based on a sum of the index value and the increment value; and 
 store the updated index value to a third location of the destination. 
 
 
     
     
       2. The processor of  claim 1 , wherein the execution circuitry to calculate the first component comprises the execution circuitry to detect, based on second bits of the immediate value, that the first component is to be based on a first indicated one of a cosine function or a sine function. 
     
     
       3. The processor of  claim 2 , wherein the execution circuitry to calculate the second component comprises the execution circuitry to detect, based on third bits of the immediate value, that the second component is to be based on a second indicated one of the cosine function or the sine function. 
     
     
       4. The processor of  claim 1 , wherein the execution circuitry to execute the decoded single instruction further comprises the execution circuitry to:
 calculate a third component of the output based on the immediate value, wherein the third component is equal to a negative of the first component; 
 calculate a fourth component of the output based on the immediate value, wherein the fourth component is equal to a negative of the second component; and 
 store the third component and the fourth component to respective locations of the destination, wherein the respective locations are selected based on the first bits of the immediate value. 
 
     
     
       5. The processor of  claim 1 , wherein the execution circuitry to calculate the first component and the second component comprises the execution circuitry to determine, based on a second bit of the immediate value, whether a scale factor is to be applied to generate the first value. 
     
     
       6. The processor of  claim 5 , wherein the execution circuitry to calculate the first component and the second component comprises the execution circuitry to determine, based on the second bit of the immediate value, whether the scale factor is to be applied to generate the second value. 
     
     
       7. A method at a processor, the method comprising:
 decoding a single instruction comprising:
 a first operand which identifies an index value, and an increment value; 
 a second operand which identifies a destination which is to store an output; and 
 an immediate value; and 
 
 executing the decoded single instruction with execution circuitry of the processor, comprising:
 accessing a lookup table based on the index value, wherein the lookup table comprises entries which each correspond to a different respective angle, wherein respective values of the entries each indicate a cosine of the corresponding angle; 
 calculating a first component of the output and a second component of the output each based on both the accessing and the immediate value; 
 storing the first component and the second component to respective locations of the destination, wherein the respective locations are selected based on first bits of the immediate value; 
 calculating an updated index value based on a sum of the index value and the increment value; and 
 storing the updated index value to a third location of the destination. 
 
 
     
     
       8. The method of  claim 7 , wherein calculating the first component comprises detecting, based on second bits of the immediate value, that the first component is to be based on a first indicated one of a cosine function or a sine function. 
     
     
       9. The method of  claim 8 , wherein calculating the second component comprises detecting, based on third bits of the immediate value, that the second component is to be based on a second indicated one of the cosine function or the sine function. 
     
     
       10. The method of  claim 7 , wherein executing the decoded single instruction further comprises:
 calculating a third component of the output based on the immediate value, wherein the third component is equal to a negative of the first component; 
 calculating a fourth component of the output based on the immediate value, wherein the fourth component is equal to a negative of the second component; and 
 storing the third component and the fourth component to respective locations of the destination, wherein the respective locations are selected based on the first bits of the immediate value. 
 
     
     
       11. The method of  claim 7 , wherein calculating the first component and the second component comprises determining, based on a second bit of the immediate value, whether a scale factor is to be applied to generate the first value. 
     
     
       12. The method of  claim 11 , wherein calculating the first component and the second component comprises determining, based on the second bit of the immediate value, whether the scale factor is to be applied to generate the second value. 
     
     
       13. A method at a processor, the method comprising:
 translating a single instruction according to a first instruction set architecture (ISA) into one or more second instructions according to a second ISA, the single instruction comprising:
 a first operand which identifies an index value, and an increment value; 
 a second operand which identifies a destination which is to store an output; and 
 an immediate value; 
 
 decoding the one or more second instructions to generate a decoded one or more third instructions; 
 executing the decoded one or more third instructions with execution circuitry of the processor, comprising:
 accessing a lookup table based on the index value, wherein the lookup table comprises entries which each correspond to a different respective angle, wherein respective values of the entries each indicate a cosine of the corresponding angle; 
 calculating a first component of the output and a second component of the output each based on both the accessing and the immediate value; 
 storing the first component and the second component to respective locations of the destination, wherein the respective locations are selected based on first bits of the immediate value; 
 calculating an updated index value based on a sum of the index value and the increment value; and 
 storing the updated index value to a third location of the destination. 
 
 
     
     
       14. The method of  claim 13 , wherein calculating the first component comprises detecting, based on second bits of the immediate value, that the first component is to be based on a first indicated one of a cosine function or a sine function. 
     
     
       15. The method of  claim 14 , wherein calculating the second component comprises detecting, based on third bits of the immediate value, that the second component is to be based on a second indicated one of the cosine function or the sine function. 
     
     
       16. The method of  claim 13 , wherein executing the one or more third instructions further comprises:
 calculating a third component of the output based on the immediate value, wherein the third component is equal to a negative of the first component; 
 calculating a fourth component of the output based on the immediate value, wherein the fourth component is equal to a negative of the second component; and 
 storing the third component and the fourth component to respective locations of the destination, wherein the respective locations are selected based on the first bits of the immediate value. 
 
     
     
       17. The method of  claim 13 , wherein calculating the first component and the second component comprises determining, based on a second bit of the immediate value, whether a scale factor is to be applied to generate the first value. 
     
     
       18. The method of  claim 17 , wherein calculating the first component and the second component comprises determining, based on the second bit of the immediate value, whether the scale factor is to be applied to generate the second value. 
     
     
       19. A non-transitory machine-readable medium storing an instruction which, when executed by a processor, causes the processor to perform a method, the method comprising:
 decoding a single instruction comprising:
 a first operand which identifies an index value, and an increment value; 
 a second operand which identifies a destination which is to store an output; and 
 an immediate value; and 
 
 executing the decoded single instruction with execution circuitry of the processor, comprising:
 accessing a lookup table based on the index value, wherein the lookup table comprises entries which each correspond to a different respective angle, wherein respective values of the entries each indicate a cosine of the corresponding angle; 
 calculating a first component of the output and a second component of the output each based on both the accessing and the immediate value; 
 storing the first component and the second component to respective locations of the destination, wherein the respective locations are selected based on first bits of the immediate value; 
 calculating an updated index value based on a sum of the index value and the increment value; and 
 storing the updated index value to a third location of the destination. 
 
 
     
     
       20. The method of  claim 19 , wherein calculating the first component comprises detecting, based on second bits of the immediate value, that the first component is to be based on a first indicated one of a cosine function or a sine function. 
     
     
       21. The method of  claim 20 , wherein calculating the second component comprises detecting, based on third bits of the immediate value, that the second component is to be based on a second indicated one of the cosine function or the sine function. 
     
     
       22. The method of  claim 19 , wherein executing the decoded single instruction further comprises:
 calculating a third component of the output based on the immediate value, wherein the third component is equal to a negative of the first component; 
 calculating a fourth component of the output based on the immediate value, wherein the fourth component is equal to a negative of the second component; and 
 storing the third component and the fourth component to respective locations of the destination, wherein the respective locations are selected based on the first bits of the immediate value. 
 
     
     
       23. The method of  claim 19 , wherein calculating the first component and the second component comprises determining, based on a second bit of the immediate value, whether a scale factor is to be applied to generate the first value. 
     
     
       24. The method of  claim 23 , wherein calculating the first component and the second component comprises determining, based on the second bit of the immediate value, whether the scale factor is to be applied to generate the second value. 
     
     
       25. An apparatus comprising:
 a decoder means for decoding a single instruction comprising:
 a first operand to identify an index value, and an increment value; 
 a second operand to identify a destination which is to store an output; and 
 an immediate value; and 
 
 an execution means for executing the decoded single instruction to:
 perform an access of a lookup table based on the index value, wherein the lookup table comprises entries which each correspond to a different respective angle, wherein respective values of the entries each indicate a cosine of the corresponding angle; 
 calculate a first component of the output and a second component of the output each based on both the access and the immediate value; 
 store the first component and the second component to respective locations of the destination, wherein the respective locations are selected based on first bits of the immediate value; 
 calculate an updated index value based on a sum of the index value and the increment value; and 
 store the updated index value to a third location of the destination. 
 
 
     
     
       26. The apparatus of  claim 25 , wherein the execution means to calculate the first component comprises the execution means to detect, based on second bits of the immediate value, that the first component is to be based on a first indicated one of a cosine function or a sine function. 
     
     
       27. The apparatus of  claim 26 , wherein the execution means to calculate the second component comprises the execution means to detect, based on third bits of the immediate value, that the second component is to be based on a second indicated one of the cosine function or the sine function. 
     
     
       28. The apparatus of  claim 25 , wherein the execution means for executing the decoded single instruction further comprises the execution means to:
 calculate a third component of the output based on the immediate value, wherein the third component is equal to a negative of the first component; 
 calculate a fourth component of the output based on the immediate value, wherein the fourth component is equal to a negative of the second component; and 
 store the third component and the fourth component to respective locations of the destination, wherein the respective locations are selected based on the first bits of the immediate value. 
 
     
     
       29. The apparatus of  claim 25 , wherein the execution means to calculate the first component and the second component comprises the execution means to determine, based on a second bit of the immediate value, whether a scale factor is to be applied to generate the first value. 
     
     
       30. The apparatus of  claim 29 , wherein the execution means to calculate the first component and the second component comprises the execution means to determine, based on the second bit of the immediate value, whether the scale factor is to be applied to generate the second value.