WSiGe electrode structures for memory devices, and associated devices and systems

Abstract

Memory devices having electrode structures that increase in resistivity with thermal cycling, and associated systems and methods, are disclosed herein. In some embodiments, a memory device includes a memory element and an electrode structure electrically coupled to the memory element. The electrode structure can include a material comprising a composition of tungsten, silicon, and germanium.

We claim: 
     
       1. A memory device, comprising:
 a memory element; and 
 an electrode structure electrically coupled to the memory element, wherein the electrode structure includes a material comprising a composition of tungsten, silicon, and germanium, wherein the electrode structure is configured to have a first resistivity before being exposed to a plurality of thermal cycles, wherein the electrode structure is configured to have a second resistivity after being exposed to the plurality of thermal cycles, and wherein the second resistivity is greater than the first resistivity. 
 
     
     
       2. The memory device of  claim 1  wherein the material is a first material, and wherein the electrode structure further includes a second material different than the first material. 
     
     
       3. The memory device of  claim 2  wherein the second material is between the memory element and the first material. 
     
     
       4. The memory device of  claim 2  wherein the second material is a carbon-based material. 
     
     
       5. The memory device of  claim 2  wherein the first material has a greater thickness than the second material. 
     
     
       6. The memory device of  claim 2  wherein the second material has a greater thickness than the first material. 
     
     
       7. The memory device of  claim 2  wherein the thickness of the first material is less than 100 angstroms. 
     
     
       8. The memory device of  claim 2  wherein the thickness of the first material is between about 50-90 angstroms. 
     
     
       9. The memory device of  claim 2  wherein the thickness of the first material is between about 10-30 angstroms. 
     
     
       10. The memory device of  claim 1  wherein a ratio of silicon to tungsten in the composition is greater than or equal to 1.0. 
     
     
       11. The memory device of  claim 1  wherein a ratio of germanium to tungsten in the composition is greater than or equal to 1.0. 
     
     
       12. The memory device of  claim 1  wherein a ratio of silicon to tungsten is greater than a ratio of germanium to tungsten in the composition. 
     
     
       13. The memory device of  claim 1  wherein a ratio of silicon to tungsten is less than a ratio of germanium to tungsten in the composition. 
     
     
       14. A memory device, comprising:
 a memory element; and 
 an electrode structure electrically coupled to the memory element, wherein the electrode structure includes a material comprising a composition of tungsten, silicon, and germanium, wherein the electrode structure is configured to have a first resistivity before being exposed to a plurality of thermal cycles, wherein the electrode structure is configured to have a second resistivity after being exposed to the plurality of thermal cycles, wherein the first resistivity is less than about 0.01 ohm-centimeter, and wherein the second resistivity is greater than the first resistivity. 
 
     
     
       15. The memory device of  claim 14  wherein the electrode structure further includes a carbide material, and wherein the composition of tungsten, silicon, and germanium is formed as a thin film over the carbide material. 
     
     
       16. The memory device of  claim 14  wherein the memory element includes a phase-change material. 
     
     
       17. A memory device, comprising:
 a memory element; 
 a first electrode structure electrically coupled to the memory element, wherein the first electrode structure includes a first material comprising a first composition of tungsten, silicon, and germanium, wherein the first electrode structure is configured to have a first resistivity before being exposed to a plurality of thermal cycles, wherein the first electrode structure is configured to have a second resistivity after being exposed to the plurality of thermal cycles, and wherein the second resistivity is greater than the first resistivity; and 
 a second electrode structure electrically coupled to the memory element, wherein the second electrode structure includes a second material comprising a second composition of tungsten, silicon, and germanium, wherein the second electrode structure is configured to have a third resistivity before being exposed to a plurality of thermal cycles, wherein the second electrode structure is configured to have a fourth resistivity after being exposed to the plurality of thermal cycles, and wherein the fourth resistivity is greater than the third resistivity. 
 
     
     
       18. The memory device of  claim 17  wherein the first electrode structure further includes a third material different than the first material, and wherein the second electrode structure further includes a fourth material different than the second material. 
     
     
       19. The memory device of  claim 18  wherein the third material is between the first material and the memory element, and wherein the fourth material is between the second material and the memory element. 
     
     
       20. The memory device of  claim 18  wherein the third and fourth materials are different. 
     
     
       21. The memory device of  claim 18  wherein the third and fourth materials are carbide materials. 
     
     
       22. The memory device of  claim 17  wherein the first and second materials are the same.