Integrated fan out method utilizing a filler-free insulating material

Abstract

A redistribution structure is made using filler-free insulating materials with a high shrinkage rate. As a result, good planarity may be achieved without the need to perform a planarization of each insulating layer of the redistribution structure, thereby simplifying the formation of the redistribution structure.

What is claimed is: 
     
       1. A method comprising:
 depositing a first metallization pattern on a substrate; 
 depositing a first insulating layer over the first metallization pattern, the first insulating layer being filler-free; 
 curing the first insulating layer, causing the first insulating layer to shrink less than 5%; 
 forming a first opening through the first insulating layer to expose a portion of the first metallization pattern; 
 without leveling the first insulating layer, depositing a second metallization pattern over the first insulating layer and in the first opening; 
 depositing a second insulating layer over the second metallization pattern, the second insulating layer being filler-free; and 
 curing the second insulating layer, causing the second insulating layer to shrink between 20% and 35%. 
 
     
     
       2. The method of  claim 1 , wherein the first insulating layer shrinks by between 1% and 5%. 
     
     
       3. The method of  claim 1 , wherein the substrate comprises a metallic coated carrier. 
     
     
       4. The method of  claim 3 , further comprising:
 flipping the carrier over; 
 attaching an integrated circuit die to the carrier; and 
 depositing an encapsulant laterally surrounding the integrated circuit die. 
 
     
     
       5. The method of  claim 3 , wherein the carrier includes pre-formed through-via openings disposed therein. 
     
     
       6. The method of  claim 1 , further comprising depositing the first metallization pattern to be three to five times thicker than the second metallization pattern. 
     
     
       7. A method comprising:
 forming a redistribution structure coupled to a conductive feature of a substrate, comprising:
 depositing and patterning a first conductive layer, 
 depositing a first insulating layer over the first conductive layer, the first insulating layer comprising a first filler-free insulating material, 
 forming openings in the first insulating layer to expose portions of the first conductive layer, 
 depositing and patterning a second conductive layer over the first insulating layer, the second conductive layer coupled to the first conducting layer through the openings, and 
 depositing a second insulating layer over the second conductive layer, the second insulating layer comprising a second filler-free insulating material, the second filler-free insulating material having a shrinkage rate between 65% and 80%; and 
 
 forming a conductive connector over the redistribution structure, the conductive connector electrically coupled to the redistribution structure. 
 
     
     
       8. The method of  claim 7 , wherein the first filler-free insulating material is different than the second filler-free insulating material. 
     
     
       9. The method of  claim 7 , wherein after depositing the second insulating layer, an upper surface of the second insulating layer is wavy. 
     
     
       10. The method of  claim 9 , wherein a difference between an average peak of the upper surface and an average valley of the upper surface is between 3 μm and 5 μm. 
     
     
       11. The method of  claim 7 , further comprising depositing the first conductive layer to be three to five times thicker than the second conductive layer. 
     
     
       12. The method of  claim 7 , wherein after depositing the second insulating layer, forming the conductive connector over the redistribution structure without performing a planarization or polishing process. 
     
     
       13. The method of  claim 7 , wherein depositing the second conductive layer comprises:
 depositing a seed layer and depositing a metal layer over the seed layer, wherein the seed layer conformally coats a recess in the first insulating layer, the recess exposing a portion of the first conductive layer. 
 
     
     
       14. The method of  claim 7 , further comprising:
 attaching a die to an opposite side of the substrate from the redistribution structure; and 
 depositing an encapsulating material laterally surrounding the die. 
 
     
     
       15. The method of  claim 14 , further comprising:
 prior to depositing the encapsulating material, forming a metallization structure disposed in a same layer as the die; 
 depositing the encapsulating material over the metallization structure and the die; and 
 planarizing the encapsulating material to level an upper surface of the metallization structure, an upper surface of the die, and an upper surface of the encapsulating material. 
 
     
     
       16. A method comprising:
 forming a first redistribution structure over a metallic coated carrier, comprising:
 depositing a first metallization pattern over the metallic coated carrier, the first metallization pattern having a first thickness, 
 depositing a first insulating layer adjacent the first metallization pattern, the first insulating layer comprising a filler free material, and 
 depositing a second metallization pattern adjacent the first insulating layer, wherein the first insulating layer has a second thickness between the first metallization pattern and the second metallization pattern, wherein the second thickness is less than the first thickness; 
 
 attaching a die over the first redistribution structure on a side of the metallic coated carrier opposite the first redistribution structure; and 
 encapsulating the die in an encapsulant. 
 
     
     
       17. The method of  claim 16 , wherein the die includes a micro-electro-mechanical-system (MEMS) device. 
     
     
       18. The method of  claim 16 , wherein the second metallization pattern has a third thickness, wherein the third thickness is less than the first thickness, wherein the first metallization pattern is disposed closer to the encapsulated die than the second metallization pattern. 
     
     
       19. The method of  claim 16 , further comprising forming an opening through the first insulating layer, and wherein depositing the second metallization pattern comprises depositing a seed layer in the opening and over the first insulating layer, and after depositing the seed layer depositing a conductive layer. 
     
     
       20. The method of  claim 16 , further comprising:
 curing the first insulating layer, causing the first insulating layer to shrink between 20% and 35%, wherein after curing the first insulating layer, an upper surface of the first insulating layer is wavy.