High thermal conductivity, high modulus structure within a mold material layer of an integrated circuit package

Abstract

An integrated circuit assembly may be formed comprising an electronic substrate, at least one integrated circuit device electrically attached to the electronic substrate, a mold material layer abutting electronic substrate and substantially surrounding the at least one integrated circuit, and at least one structure within the mold material layer, wherein the at least one structure comprises a material having a modulus of greater than about 20 gigapascals and a thermal conductivity of greater than about 10 watts per meter-Kelvin.

What is claimed is: 
     
       1. An integrated circuit assembly, comprising:
 an electronic substrate; 
 at least one integrated circuit device electrically attached to the electronic substrate; 
 a mold material layer abutting the electronic substrate and substantially surrounding the at least one integrated circuit device; and 
 at least one structure within the mold material layer, wherein the at least one structure comprises a material having a modulus of greater than about 20 gigapascals and a thermal conductivity of greater than about 10 watts per meter-Kelvin. 
 
     
     
       2. The integrated circuit assembly of  claim 1 , wherein the material of the at least one structure is selected from the group consisting of metal, graphene, and sintering paste. 
     
     
       3. The integrated circuit assembly of  claim 1 , wherein the electronic substrate is an active device. 
     
     
       4. The integrated circuit assembly of  claim 1 , wherein the electronic substrate is a passive device. 
     
     
       5. The integrated circuit assembly of  claim 1 , wherein the at least one structure substantially surrounds the at least one integrated circuit device. 
     
     
       6. An electronic system, comprising:
 a board; 
 an integrated circuit assembly electrically attached to the board, wherein the integrated circuit assembly comprises:
 an electronic substrate; 
 at least one integrated circuit device electrically attached to the electronic substrate; 
 a mold material layer abutting the electronic substrate and substantially surrounding the at least one integrated circuit device; and 
 at least one structure within the mold material layer, wherein the at least one structure comprises a material having a modulus of greater than about 20 gigapascals and a thermal conductivity of greater than about 10 watts per meter-Kelvin. 
 
 
     
     
       7. The electronic system of  claim 6 , wherein the material of the at least one structure is selected from the group consisting of metal, graphene, and sintering paste. 
     
     
       8. The electronic system of  claim 6 , wherein the electronic substrate is an active device. 
     
     
       9. The electronic system of  claim 6 , wherein the electronic substrate is a passive device. 
     
     
       10. The electronic system of  claim 6 , wherein the at least one structure substantially surrounds the at least one integrated circuit device. 
     
     
       11. A method of forming an integrated circuit assembly, comprising:
 forming an electronic substrate; 
 forming at least one integrated circuit device; 
 electrically attaching the at least one integrated circuit device to the electronic substrate; 
 forming a mold material layer to abut the electronic substrate and substantially surrounding the at least one integrated circuit device; and 
 forming at least one structure within the mold material layer, wherein the at least one structure comprises a material having a modulus of greater than about 20 gigapascals and a thermal conductivity of greater than about 10 watts per meter-Kelvin. 
 
     
     
       12. The method of  claim 11 , wherein forming the electronic substrate comprises forming an active device. 
     
     
       13. The method of  claim 11 , wherein forming the electronic substrate comprises forming a passive device. 
     
     
       14. The method of  claim 11 , wherein forming the at least one structure comprises forming the at least one structure prior to forming the mold material layer. 
     
     
       15. The method of  claim 14 , wherein forming the at least one structure comprises forming the at least one structure from the material selected from the group consisting of metal, graphene, and sintering paste. 
     
     
       16. The method of  claim 14 , further comprising planarizing the mold material layer to expose a portion of the at least one integrated circuit device. 
     
     
       17. The method of  claim 11 , wherein forming the at least one structure comprises forming at least one trench in the mold material layer and forming the at least one structure in the at least one trench. 
     
     
       18. The method of  claim 17 , wherein forming the at least one structure in the at least one trench comprises forming the at least one structure from the material selected from the group consisting of metal, graphene, and sintering paste. 
     
     
       19. The method of  claim 17 , further comprising planarizing the mold material layer to expose a portion of the at least one integrated circuit device prior to forming the at least one trench. 
     
     
       20. The method of  claim 11 , wherein forming the at least one structure comprises forming the at least one structure to substantially surround the at least one integrated circuit device.