Temperature hierarchy solder bonding

Abstract

A semiconductor device and formation thereof. The semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a plurality of pillars interconnecting the first semiconductor structure and the second semiconductor structure. The plurality of pillars include a first solder layer and a second solder layer, wherein the first solder layer has a higher melting point than the second solder layer.

What is claimed is: 
     
       1. A method of interconnecting a first semiconductor structure with a second semiconductor structure, the method comprising:
 forming a plurality of pillars on a surface of the first semiconductor structure, wherein each pillar in the plurality of pillars is formed by:
 depositing a first metal layer onto a surface of the first semiconductor structure; 
 depositing a first solder layer onto the first metal layer; 
 depositing a second metal layer onto the first solder layer; and 
 depositing a second solder layer onto the second metal layer inverting the first semiconductor structure having the plurality of pillars formed on the surface of the first semiconductor; and 
 
 interconnecting the inverted first semiconductor structure with the second semiconductor structure by attaching the second solder layer of each pillar in the plurality of pillars to a respective bonding pad of a plurality of bonding pads located on a top surface of the second semiconductor structure, wherein the second solder layer of each pillar in the plurality of pillars attached to the respective bonding pad of the plurality of bonding pads located on the top surface of the second semiconductor structure has a lower melting point than a melting point of the first solder layer formed between the first metal layer and the second metal layer of each pillar in the plurality of pillars. 
 
     
     
       2. The method of  claim 1 , further comprising:
 forming a first barrier layer between the first metal layer and the first solder layer; and 
 forming a second barrier layer between the first solder layer and the second metal layer. 
 
     
     
       3. The method of  claim 1 , wherein attaching the second solder layer of a pillar to a bonding pad further includes reflowing only the second solder layer to form a solder joint between the second solder layer and the bonding pad. 
     
     
       4. The method of  claim 1 , wherein:
 the melting point of the first solder layer is greater than 200° C.; and 
 the melting point of the second solder layer is less than 200° C. 
 
     
     
       5. The method of  claim 1 , wherein:
 the first solder layer is formed from Sn, a SnAg alloy, or a SnAgCu alloy; and 
 the second solder layer is formed from indium, a SnBi alloy, a SnIn alloy, or a SnBiAg alloy. 
 
     
     
       6. The method of  claim 1 , wherein:
 the first metal layer and the second metal layer are Cu; and 
 the plurality of bonding pads are formed from at least one material selected from the group consisting of Au, Pd, Cu, Ni, and alloys thereof. 
 
     
     
       7. A semiconductor device, comprising:
 a first semiconductor structure; 
 a second semiconductor structure located below the first semiconductor structure; and 
 a plurality of pillars interconnecting the first semiconductor structure and the second semiconductor structure, wherein the plurality of pillars include:
 a first solder layer located between a first metal layer and a second metal layer; and 
 a second solder layer attached to a bonding pad formed on a surface of the second semiconductor structure, wherein a melting point of the first solder layer located between the first metal layer and the second metal layer is greater than a melting pointing of the second solder layer attached to the bonding pad formed on the surface of the second semiconductor structure. 
 
 
     
     
       8. The semiconductor device of  claim 7 , wherein:
 the first solder layer is formed from Sn, a SnAg alloy, or a SnAgCu alloy; and 
 the second solder layer is formed from indium, a SnBi alloy, a SnIn alloy, or a SnBiAg alloy. 
 
     
     
       9. The semiconductor structure of  claim 7 , wherein after heating the first semiconductor structure, the second semiconductor structure, and the plurality of pillars interconnecting the first semiconductor structure and the second semiconductor structure, the first solder layer located between the first metal layer and the second metal layer forms a solder elbow and the second solder layer attached to the bonding pad formed on the surface of the second semiconductor structure forms a solder joint. 
     
     
       10. The semiconductor device of  claim 7 , wherein:
 the first metal layer and the second metal layer are formed from Cu; and 
 the bonding pad is formed from at least one material selected from the group consisting of Au, Pd, Cu, Ni, and alloys thereof. 
 
     
     
       11. The semiconductor device of  claim 7 , further comprising:
 a first barrier layer located between the first metal layer and the first solder layer; and 
 a second barrier layer located between the first solder layer and the second metal layer. 
 
     
     
       12. The semiconductor device of  claim 11 , wherein the first barrier layer and the second barrier layer are formed from Ni. 
     
     
       13. The semiconductor device of  claim 7 , wherein:
 a percentage of a total solder volume of the second solder layer that has been converted into an intermetallic compound is greater than a percentage of a total solder volume of the first solder layer that has been converted into an intermetallic compound. 
 
     
     
       14. The semiconductor device of  claim 7 , wherein:
 a percentage of a total solder volume of the first solder layer that has been converted into an intermetallic compound is greater than or equal to zero percent and less than or equal to twenty percent; and 
 a percentage of a total solder volume of the second solder layer that has been converted into an intermetallic compound is greater than or equal to fifty percent. 
 
     
     
       15. The semiconductor device of  claim 7 , wherein:
 a percentage of a total volume of the second solder layer that has been converted into an intermetallic compound is one hundred percent. 
 
     
     
       16. The semiconductor device of  claim 7 , wherein the first solder layer is a metal or metal alloy that has a melting point greater than 200° C. and the second solder layer is a metal or metal alloy that has a melting point less than 200° C. 
     
     
       17. The semiconductor device of  claim 7 , wherein:
 the first solder layer is a metal or metal alloy, and the melting point of the first solder layer is greater than 200° C.; and 
 the second solder layer is a metal or metal alloy, and the melting point of the second solder layer is greater than or equal to 110° C. and less than or equal to 180° C. 
 
     
     
       18. The semiconductor device of  claim 7 , wherein a coefficient of thermal conductivity of the first semiconductor structure is different than a coefficient of thermal conductivity of the second semiconductor structure. 
     
     
       19. A pillar structure used to interconnect a first semiconductor structure with a second semiconductor structure, the pillar structure comprising:
 a first solder layer located between a first metal layer and a second metal layer, wherein the first solder layer is a solder elbow; and 
 a second solder layer formed on the second metal layer, wherein the second solder layer is a solder joint, and further wherein:
 a melting point of the first solder layer located between the first metal layer and the second metal layer is greater than a melting pointing of the second solder layer formed on the second metal layer.