Three dimensional IC package with thermal enhancement

Abstract

An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may be formed as an integral part of an IC die that may assist temperature control of the IC die when in operation. The temperature control element may include a heat dissipation material disposed therein to assist dissipating thermal energy generated by the plurality of devices in the IC die during operation.

The invention claimed is: 
     
       1. An integrated circuit (IC) package, comprising:
 an IC die disposed on a package substrate, wherein the IC die has a temperature control element disposed on a first side of a substrate and a plurality of devices formed on a second side of the substrate; 
 one or more memory stacks formed on the package substrate adjacent to the IC die; 
 a heat distribution device disposed on the IC die, the heat distribution device comprising a plate base and a plate lid disposed on the plate base. 
 
     
     
       2. The IC package of  claim 1 , wherein the first side is opposite to the second side. 
     
     
       3. The IC package of  claim 1 , comprising:
 an activation layer formed between the plurality of device structures and the temperature control element. 
 
     
     
       4. The IC package of  claim 3 , wherein the base structure comprises silicon. 
     
     
       5. The IC package of  claim 1 , wherein the IC die is an application specific integrated circuit (ASIC). 
     
     
       6. The IC package of  claim 1 , wherein the temperature control element has an upper surface facing the heat distribution device and a lower surface facing the first side of the substrate. 
     
     
       7. The IC package of  claim 1 , wherein the temperature control element comprises a plurality of vias formed in a base structure. 
     
     
       8. The IC package of  claim 7 , wherein the vias are blind vias having an end embedded in the base structure. 
     
     
       9. The IC package of  claim 7 , wherein the vias are open vias having both ends formed at outer surfaces of the base structure. 
     
     
       10. The IC package of  claim 7 , wherein the temperature control element comprises a heat dissipation material disposed in the vias in the base structure. 
     
     
       11. The IC package of  claim 10 , wherein the heat dissipation material comprises at least one of conductive materials, ceramic materials, metal-ceramic composite materials, metal alloy materials, semiconductor materials, graphite, diamond, or organic materials. 
     
     
       12. The IC package of  claim 7 , wherein the plurality of vias comprises:
 a first group of the vias having a first pitch density formed in an edge portion of the base structure; and 
 a second group of the vias having a second pitch density different from the first pitch density formed in a center portion of the base structure. 
 
     
     
       13. The IC package of  claim 7 , wherein the base structure comprises silicon. 
     
     
       14. The IC package of  claim 1 , further comprising a stiffener surrounding the IC die and the one or more memory stacks and extending between the heat distribution device and the package substrate. 
     
     
       15. The IC package of  claim 1 , wherein the plate base comprises a plurality of thermally conductive fins. 
     
     
       16. The IC package of  claim 1 , wherein the plate lid comprises an inlet and an outlet. 
     
     
       17. The IC package of  claim 1 , further comprising a thermal interface material (TIM) in contact with the IC die and the one or more memory stacks,
 wherein the heat distribution device overlies the TIM.