Selective silicon deposition

Abstract

Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may include one or more patterned features separated by exposed regions of the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor and the hydrogen-containing precursor. Forming the plasma of the silicon-containing precursor and the hydrogen-containing precursor may be performed at a plasma power of less than or about 1,000 W. The methods may include depositing a silicon-containing material on the one or more patterned features along the substrate. The silicon-containing material may be deposited on the patterned features at a rate of at least 2:1 relative to deposition on the exposed regions of the substrate.

The invention claimed is: 
     
       1. A semiconductor processing method comprising:
 providing a silicon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region of the semiconductor processing chamber, and wherein the substrate comprises one or more patterned features separated by exposed regions of the substrate; 
 providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber; 
 forming a plasma of the silicon-containing precursor and the hydrogen-containing precursor, wherein forming the plasma of the silicon-containing precursor and the hydrogen-containing precursor is performed at a plasma power of less than or about 1,000 W; 
 depositing a silicon-containing material on the one or more patterned features, wherein the silicon-containing material as-deposited is deposited on the patterned features at a rate of at least 10:1 relative to deposition on the exposed regions of the substrate; 
 applying a bias power to the processing region of the semiconductor processing chamber while depositing the silicon-containing material on the one or more patterned features, wherein the bias power is less than or about 100 W, wherein a pulsing frequency of the bias power is less than or about 2,000 Hz, and wherein a duty cycle of the bias power is less than 10%; and 
 performing an etching process, wherein the plasma power, the bias power, and the duty cycle of the bias power are increased between depositing the silicon-containing material and performing the etching process. 
 
     
     
       2. The semiconductor processing method of  claim 1 , wherein the silicon-containing material is silicon tetrachloride (SiCl 4 ). 
     
     
       3. The semiconductor processing method of  claim 1 , wherein the one or more patterned features comprise tin oxide, silicon, silicon oxide, silicon oxynitride, or silicon-containing anti-reflective layer (SiARC). 
     
     
       4. The semiconductor processing method of  claim 1 , wherein the one or more patterned features overly a carbon-containing layer. 
     
     
       5. The semiconductor processing method of  claim 4 , wherein the one or more patterned features protrude greater than or about 5 nm from the carbon-containing layer. 
     
     
       6. The semiconductor processing method of  claim 1 , wherein a temperature within the semiconductor processing chamber is maintained at less than or about 100° C. while depositing the silicon-containing material on the one or more patterned features. 
     
     
       7. The semiconductor processing method of  claim 1 , wherein a pressure within the semiconductor processing chamber is maintained at less than 10 mTorr while depositing the silicon-containing material on the one or more patterned features. 
     
     
       8. The semiconductor processing method of  claim 1 , further comprising:
 providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber; 
 forming a plasma of the oxygen-containing precursor; and 
 etching a portion of the silicon-containing material and the exposed regions of the substrate with the plasma of the oxygen-containing precursor to form recesses in the silicon-containing material, wherein subsequent the etching, the recesses are characterized by an undercut of less than or about 3 nm. 
 
     
     
       9. The semiconductor processing method of  claim 8 , wherein forming the plasma of the oxygen-containing precursor is performed at a plasma power of greater than or about 200 W. 
     
     
       10. A semiconductor processing method comprising:
 providing a silicon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region of the semiconductor processing chamber, and wherein the substrate defines one or more patterned features along the substrate; 
 forming a plasma of the silicon-containing precursor, wherein forming the plasma of the silicon-containing precursor is performed at a plasma power of less than or about 1,000 W; 
 depositing a discontinuous silicon-containing material on the substrate, wherein the discontinuous silicon-containing material is selectively deposited on the one or more patterned features along the substrate, and wherein a pressure within the semiconductor processing chamber is maintained at less than or about 30 mTorr while depositing the discontinuous silicon-containing material on the one or more patterned features; 
 applying a bias power to the processing region of the semiconductor processing chamber while depositing the discontinuous silicon-containing material on the one or more patterned features, wherein the bias power is less than or about 100 W, and wherein a duty cycle of the bias power is less than 10%; and 
 performing an etching process, wherein the plasma power, the bias power, and the duty cycle of the bias power are increased between depositing the discontinuous silicon-containing material and performing the etching process. 
 
     
     
       11. The semiconductor processing method of  claim 10 , wherein:
 a temperature within the semiconductor processing chamber is maintained at less than or about 75° C. while depositing the discontinuous silicon-containing material. 
 
     
     
       12. The semiconductor processing method of  claim 10 , further comprising etching one or more recesses into a carbon-containing layer deposited on the substrate with a plasma of an oxygen-containing precursor subsequent depositing the discontinuous silicon-containing material on the substrate. 
     
     
       13. The semiconductor processing method of  claim 12 , wherein the oxygen-containing precursor comprises diatomic oxygen. 
     
     
       14. The semiconductor processing method of  claim 12 , wherein subsequent the etching, the one or more recesses are characterized by an undercut of less than or about 2 nm. 
     
     
       15. A semiconductor processing method comprising:
 providing a silicon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region of the semiconductor processing chamber, wherein the substrate comprises a layer of carbon-containing material, wherein the substrate comprises a patterned metal-containing photoresist overlying the layer of carbon-containing material, and wherein at least a portion of the layer of carbon-containing material is exposed through the patterned metal-containing photoresist; 
 forming a plasma of the silicon-containing precursor and the hydrogen-containing precursor, wherein forming the plasma of the silicon-containing precursor and the hydrogen-containing precursor is performed at a plasma power of less than or about 1,000 W; 
 depositing a silicon-containing material on the patterned metal-containing photoresist along the substrate; 
 applying a bias power to the processing region of the semiconductor processing chamber while depositing the silicon-containing material on the patterned metal-containing photoresist, wherein the bias power is less than or about 100 W, and wherein a duty cycle of the bias power is less than 10%; 
 providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber; 
 forming a plasma of the oxygen-containing precursor; and 
 etching one or more recesses into the layer of carbon-containing material with the plasma of the oxygen-containing precursor, wherein the plasma power, the bias power, and the duty cycle of the bias power are increased between depositing the silicon-containing material and etching of one or more recesses into the layer of carbon-containing material. 
 
     
     
       16. The semiconductor processing method of  claim 15 , wherein the silicon-containing material is silicon tetrachloride (SiCl 4 ). 
     
     
       17. The semiconductor processing method of  claim 15 , further comprising reducing a pressure in the semiconductor processing chamber prior to providing the oxygen-containing precursor to the processing region of the semiconductor processing chamber. 
     
     
       18. The semiconductor processing method of  claim 15 , wherein forming the plasma of the oxygen-containing precursor is performed at a plasma power of greater than or about 300 W. 
     
     
       19. The semiconductor processing method of  claim 15 , wherein the bias power is greater than 0 W.