Method for manufacturing semiconductor structure with power connecting structures under transistors and semiconductor structure with power connecting structures under transistors

Abstract

A method for manufacturing a semiconductor structure with power connecting structures under transistors comprises: forming a stop layer structure in a semiconductor substrate to divide the semiconductor substrate into a first substrate part and a second substrate part; forming a plurality of stop portions in the first substrate part and in proximity to an active surface; arranging the transistor elements on the active surface, the contact portions of the transistor elements corresponding to the stop portions; removing the second substrate part and the stop layer structure; forming a first patterned mask layer with first patterned openings on a bottom surface of the first substrate part, the first patterned openings corresponding to the stop portions; forming through open slots in the first substrate part and exposing the contact portions via the open slots; forming a protecting layer to cover side walls of the open slots; forming a conductive layer to cover the contacts; and forming the power connecting structures in the open slots. The method has flexibility and can improve the device performance.

What is claimed is: 
     
       1. A semiconductor structure with power connecting structures under transistors, comprising:
 a substrate having an active surface and a bottom surface, the bottom surface being formed with at least one open slot, the at least one open slot passing through the active surface, and the at least one open slot comprising two opposite side walls and an open end; 
 an active layer arranged on the active surface and connected with the open end, the active layer comprising at least one transistor element and an interconnection layer, the interconnection layer covering the at least one transistor element, the at least one transistor element comprising at least one contact portion, and the at least one contact portion being exposed via the open end; 
 a plurality of stop portions respectively buried in the substrate, connected with the two side walls of the at least one open slot and in proximity to the open end; 
 a protecting layer conformally arranged on the two side walls and the bottom surface; 
 at least one conductive layer arranged on the at least one contact portion exposed via the open end; 
 an electroplating seed layer conformally covering the part of protecting layer and the at least one conductive layer located on the two side walls; and 
 at least one power connecting structure filling the at least one open slot. 
 
     
     
       2. The semiconductor structure with power connecting structures under transistors according to  claim 1 , wherein a distance between the stop portion and the active surface is between 5 nanometers and 20 nanometers, and a material of the stop portion is silicon nitride.