US12396092B2ActiveUtilityA1
Ceramic circuit board and semiconductor device using same
Est. expiryFeb 17, 2041(~14.6 yrs left)· nominal 20-yr term from priority
H10W 40/255H10W 40/258H10W 74/10H10W 74/40H10W 70/68H05K 2201/06H05K 3/388H05K 1/0271H05K 1/0265H05K 1/0306H05K 3/38H05K 3/022
91
PatentIndex Score
1
Cited by
12
References
16
Claims
Abstract
A ceramic circuit board includes a ceramic substrate and a metal plate bonded together via a bonding layer, wherein when the ceramic circuit board is observed through a cross-section defined by a thickness direction and lateral direction of the ceramic circuit board: a side surface of the metal plate has an inclined shape; and the bonding layer has a bonding-layer protruding portion which protrudes by 20 μm or more and 150 μm or less from an edge where the bonding layer is in contact with the side surface of the metal plate. The shape and Vickers hardness of the side surface of the metal plate are controlled. The ceramic substrate is preferably a silicon nitride substrate.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A ceramic circuit board comprising a ceramic substrate and a metal plate bonded together via a bonding layer, wherein
when the ceramic circuit board is observed through a cross-section defined by a thickness direction and lateral direction of the ceramic circuit board:
a side surface of the metal plate has an inclined shape;
the bonding layer has a bonding-layer protruding portion which protrudes by 20 μm or more and 150 μm or less from an edge where the bonding layer is in contact with the side surface of the metal plate;
an angle BAC is 110 degrees or more, where a point A is on the edge, a point B is on a side surface of the metal plate that is 20 μm away from the point A inward in the lateral direction, and a point C is on a surface of the bonding-layer protruding portion that is 20 μm away from the point A outward in the lateral direction;
Hm denotes an average value of Vickers hardness at ten locations in a region between a line in the lateral direction passing through the point B and an interface between the metal plate and the bonding layer;
300>Hm>Hb and Hm/Hb<2, where Hb denotes an average value of Vickers hardness at ten locations in the bonding layer; and
a ratio R of an area where a component of the bonding layer other than that of the metal plate is present in the region is 5% or more and 20% or less.
2. The ceramic circuit board according to claim 1 , wherein a length of the bonding-layer protruding portion is in a range of 20 μm or more and 80 μm or less.
3. The ceramic circuit board according to claim 1 , wherein the metal plate is made of any one of Cu, Al, and an alloy containing these metals.
4. The ceramic circuit board according to claim 1 , wherein the metal plate has a thickness of 0.3 mm or more.
5. The ceramic circuit board according to claim 3 , wherein the metal plate has a thickness of 0.3 mm or more.
6. The ceramic circuit board according to claim 1 , wherein the component of the bonding layer other than that of the metal plate in a region M is one or more selected from Ag, Ti, Sn, In, Zr, Al, Si, C, and Mg.
7. The ceramic circuit board according to claim 5 , wherein the component of the bonding layer other than that of the metal plate in a region M is one or more selected from Ag, Ti, Sn, In, Zr, Al, Si, C, and Mg.
8. The ceramic circuit board according to claim 1 , wherein the ceramic substrate is a silicon nitride substrate having a thermal conductivity of 80 W/m·K or more.
9. The ceramic circuit board according to claim 1 , wherein the bonding layer has a Vickers hardness Hb of 90 or more and 200 or less.
10. The ceramic circuit board according to claim 7 , wherein the bonding layer has a Vickers hardness Hb of 90 or more and 200 or less.
11. The ceramic circuit board according to claim 1 , wherein a number of triple points between metal crystal grains in a unit area of 1 mm×1 mm on a surface of the metal plate is in a range of 20 or more and 150 or less.
12. The ceramic circuit board according to claim 10 , wherein a number of triple points between metal crystal grains in a unit area of 1 mm×1 mm on a surface of the metal plate is in a range of 20 or more and 150 or less.
13. A semiconductor device comprising a semiconductor element mounted on the ceramic circuit board according to claim 1 .
14. A semiconductor device comprising a semiconductor element mounted on the ceramic circuit board according to claim 12 .
15. The semiconductor device according to claim 13 , wherein the semiconductor device is molded with resin or gel.
16. The semiconductor device according to claim 14 , wherein the semiconductor device is molded with resin or gel.Cited by (0)
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