US2002127853A1PendingUtilityA1

Electrode for plasma processes and method for manufacture and use thereof

39
Priority: Dec 29, 2000Filed: Dec 29, 2000Published: Sep 12, 2002
Est. expiryDec 29, 2020(expired)· nominal 20-yr term from priority
H10P 50/242H01J 37/3255H01J 37/32009
39
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Claims

Abstract

A silicon electrode for a plasma reaction chamber wherein processing of a semiconductor substrate such as a single wafer can be carried out and a method of processing a semiconductor substrate with the electrode. The electrode is a low resistivity electrode having an electrical resistivity of less than 1 ohm-cm. The electrode can be a zero defect single crystal silicon or silicon carbide electrode such as a showerhead electrode bonded or clamped to support such as a temperature controlled plate or ring. The showerhead electrode can be in the form of a circular disk of uniform thickness and an elastomeric joint can be provided between a support ring and the electrode. The electrode can include gas outlets having 0.020 to 0.030 inch diameters.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A low resistivity silicon electrode adapted to be mounted in a plasma reaction chamber used in semiconductor substrate processing, comprising: 
 a silicon electrode having an electrical resistivity of less than 1 ohm-cm, the electrode having an RF driven or electrically grounded surface on one side thereof, the surface being exposed to plasma in the plasma reaction chamber during use of the electrode.    
     
     
         2 . The electrode of  claim 1 , the electrode comprising a showerhead electrode having a plurality of gas outlets arranged to distribute process gas in the plasma reaction chamber during use of the showerhead electrode.  
     
     
         3 . The electrode of  claim 2 , wherein the gas outlets have diameters of 0.020 to 0.030 inch and the gas outlets are distributed across the exposed surface.  
     
     
         4 . The electrode of  claim 1 , wherein the electrode comprises single crystal silicon or silicon carbide having heavy metal contamination of less than 10 parts per million.  
     
     
         5 . The electrode of  claim 1 , wherein the electrode comprises an electrically grounded upper electrode of a parallel plate plasma reactor.  
     
     
         6 . The electrode of  claim 1 , wherein the electrical resistivity of the electrode is less than 0.1 ohm-cm.  
     
     
         7 . The electrode of  claim 1 , wherein the electrical resistivity of the electrode is less than 0.05 ohm-cm.  
     
     
         8 . A plasma etch reactor having an electrode assembly which includes the electrode of  claim 1 , the electrode being bonded to a support member by an elastomeric joint, the elastomeric joint comprising an electrically conductive elastomeric material between the electrode and the support member, the elastomeric material including an electrically conductive filler which provides an electrical current path between the electrode and the support member.  
     
     
         9 . A plasma etch reactor having an electrode assembly which includes the electrode of  claim 1 , the electrode being resiliently clamped to a support member by a clamping member.  
     
     
         10 . A plasma reaction chamber including the showerhead electrode of  claim 2 , the showerhead electrode being bonded or clamped to a temperature-controlled member in an interior of the plasma reaction chamber, the temperature-controlled member including a gas passage supplying a process gas to the showerhead electrode, the temperature-controlled member including a cavity and at least one baffle plate located in the cavity, the gas passage supplying process gas so as to pass through the baffle prior to passing through the showerhead electrode.  
     
     
         11 . A method of processing a semiconductor substrate in a plasma reaction chamber wherein an electrode assembly includes an RF driven or electrically grounded silicon electrode having a resistivity of less than 1 ohm-cm, comprising: 
 supplying a semiconductor substrate to the plasma reaction chamber;    supplying process gas to an interior of the plasma reaction chamber;    energizing the process gas to form a plasma in contact with an exposed surface of the semiconductor substrate;    processing the substrate with the plasma.    
     
     
         12 . The method of  claim 11 , wherein the semiconductor substrate comprises a silicon wafer and the method includes etching a dielectric or conductive layer of material on the wafer.  
     
     
         13 . The method of  claim 11 , wherein the method includes depositing a layer of material on the semiconductor substrate.  
     
     
         14 . The method of  claim 11 , wherein the electrode comprises an upper electrode of a parallel plate plasma reactor, the electrode being supplied RF power during processing of the substrate.  
     
     
         15 . The method of  claim 11 , wherein the electrode comprises an upper electrode of a parallel plate plasma reactor, a lower electrode of the parallel plate plasma reactor being supplied RF energy of at least one frequency and the upper electrode being electrically grounded during processing of the substrate.  
     
     
         16 . The method of  claim 11 , wherein the electrode comprises an electrically grounded, non-powered single crystal silicon showerhead electrode bonded or clamped to a temperature-controlled member through which the process gas is supplied to the showerhead electrode, the grounded showerhead electrode providing a ground path effective to confine the plasma and the substrate comprising a silicon wafer which is subjected to etching by the plasma.  
     
     
         17 . The method of  claim 11 , wherein the electrode comprises an RF driven single crystal silicon showerhead electrode bonded or clamped to a temperature-controlled member through which the process gas is supplied to the showerhead electrode, the showerhead electrode forming the plasma by energizing the process gas and the substrate comprising a silicon wafer which is subjected to etching by the plasma.  
     
     
         18 . The method of  claim 11 , wherein the electrical resistivity of the electrode is less than 0.1 ohm-cm and the electrode comprises zero defect single crystal silicon or silicon carbide having heavy metal contamination of less than 10 parts per million.  
     
     
         19 . The method of  claim 11 , wherein the electrode couples RF power into the plasma more efficiently and with less heat-up compared to a conventional electrode having an electrical resistivity of 10 ohm-cm or higher.  
     
     
         20 . The method of  claim 11 , wherein the electrode includes gas outlets through which the process gas passes into the chamber, the gas outlets having diameters of 0.020 to 0.030 inch and the process gas comprising an etchant gas, the electrode exhibiting less build-up of polymer byproducts within the gas outlets and on a backside of the electrode during etching of the substrate with the etchant gas compared to a conventional electrode having 0.033 inch diameter gas outlets.

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