US2002176238A1PendingUtilityA1

Multi-chip module having interconnect dies

38
Assignee: PANDA PROJECT INCPriority: Nov 14, 1997Filed: Jul 15, 2002Published: Nov 28, 2002
Est. expiryNov 14, 2017(expired)· nominal 20-yr term from priority
H10W 90/753H10W 72/5449H10W 90/401H10W 90/00H10W 70/479H10W 70/641H10W 70/611H05K 7/00
38
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A multi-chip module includes a housing having insulative side walls and an end plate, conductive leads extending from the side walls, integrated circuit (IC) dies mounted to the end plate, and one or more interconnect dies mounted to the end plate. The end plate is made from a heat sink material, such as copper. Each interconnect die is positioned between a pair of the IC dies. Electrically conductive material connects the IC dies to the interconnect die, connects the IC dies to the conductive leads, and connects the interconnect dies to the conductive leads. The interconnect dies function to interconnect the IC dies and to interconnect the IC dies to the conductive leads. The interconnect die may be embodied by wiring layers formed on a silicon substrate.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A multi-chip module for housing multiple integrated circuit dies comprising: 
 a housing;    a plurality of electrically conductive leads held in said housing, each of said conductive leads including an internal lead section extending within said housing and an external lead section extending outside of said housing;    first and second integrated circuit dies mounted within said housing; and    an interconnect die mounted within said housing between said first and second integrated circuit dies, said interconnect die being electrically connected to the internal lead section of at least one of said electrically conductive leads, wherein said interconnect die transmits signals between said first integrated circuit die, said second integrated circuit die, and said at least one conductive lead.    
     
     
         2 . A multi-chip module according to  claim 1 , wherein said interconnect die receives signals from said first integrated circuit die and outputs the received signals to said second integrated circuit die, and receives signals from said at least one conductive lead and outputs the received signals to at least one of said first and second integrated circuit dies.  
     
     
         3 . A multi-chip module according to  claim 1 , wherein said housing includes a plurality of insulative side walls that define at least a portion of the exterior surface of said housing and said plurality of conductive leads are held in said side walls.  
     
     
         4 . A multi-chip module according to  claim 3 , wherein said conductive leads extend through said side walls in multiple, vertically-spaced tiers.  
     
     
         5 . A multi-chip module according to  claim 3 , wherein said insulative side walls include a plurality of tombstone-shaped openings for receiving said conductive leads.  
     
     
         6 . A multi-chip module according to  claim 3 , wherein said housing further comprises an end plate joined to said insulative side walls, said end plate being formed of a heat sink material.  
     
     
         7 . A multi-chip module according to  claim 6 , wherein first and second integrated circuit dies and said interconnect die are mounted to said end plate.  
     
     
         8 . A multi-chip module according to  claim 7 , wherein said end plate comprises copper.  
     
     
         9 . A multi-chip module according to  claim 1 , wherein said interconnect die comprises a silicon substrate, a plurality of bonding pads, and wiring layers connecting pairs of said bonding pads.  
     
     
         10 . A multi-chip module according to  claim 1 , wherein said interconnect die comprises only passive components and said first and second integrated circuit dies comprise active components.  
     
     
         11 . A multi-chip module according to  claim 1 , wherein said first integrated circuit die is electrically connected to the internal lead section of at least a first one of said electrically conductive leads and said second integrated circuit die is electrically connected to the internal lead section of at least a second one of said electrically conductive leads.  
     
     
         12 . A multi-chip module for housing multiple integrated circuit dies comprising: 
 a housing including a plurality of insulative side walls and an end plate, said end plate joined to the side walls to define a cavity;    a plurality of electrically conductive leads held in said side walls, each of said conductive leads including an internal lead section extending within the cavity and an external lead section extending outside of said housing;    a plurality of integrated circuit dies mounted to said end plate within the cavity;    a plurality of interconnect dies mounted to said end plate within the cavity, each said interconnect die positioned adjacent to at least two of said plurality of integrated circuit dies; and    electrically conductive material electrically connecting said electrically conductive leads, said integrated circuit dies, and said interconnect dies.    
     
     
         13 . A multi-chip module according to  claim 12 , wherein said electrically conductive material couples (1) at least one of said interconnect dies to the internal lead section of at least one of said conductive leads, (2) at least one of said integrated circuit dies to the internal lead section of at least one other of said conductive leads, and (3) said integrated circuit dies to said interconnect dies.  
     
     
         14 . A multi-chip module according to  claim 12 , wherein at least one of said interconnect dies receives signals from at least one of said integrated circuit dies and outputs the received signals either to the electrically conductive leads or to another of said integrated circuit dies.  
     
     
         15 . A multi-chip module according to  claim 12 , wherein at least one of said interconnect dies comprises: 
 a first bonding pad electrically coupled to a first one of said integrated circuit dies by said electrically conductive material;    a second bonding pad electrically coupled to a second one of said integrated circuit dies by said electrically conductive material; and    a wiring path coupling said first bonding pad to said second bonding pad.    
     
     
         16 . A multi-chip module according to  claim 12 , wherein at least one of said interconnect dies comprises: 
 a first bonding pad electrically coupled to one of said integrated circuit dies by said electrically conductive material;    a second bonding pad electrically coupled to one of said electrically conductive leads by said electrically conductive material; and    a wiring path coupling said first bonding pad to said second bonding pad.    
     
     
         17 . A multi-chip module according to  claim 12 , wherein: 
 a first one of said interconnect dies comprises a first bonding pad electrically coupled to a first one of said integrated circuit dies by said electrically conductive material, a second bonding pad electrically coupled to a third bonding pad of a second one of said interconnect dies by said electrically conductive material, and a wiring path coupling said first bonding pad to said second bonding pad; and    the second one of said interconnect dies comprises the third bonding pad, a fourth bonding pad electrically coupled to a second one of said integrated circuit dies by said electrically conductive material, and a wiring path coupling said third bonding pad to said fourth bonding pad.    
     
     
         18 . A multi-chip module according to  claim 12 , wherein: 
 a first one of said interconnect dies comprises a first bonding pad electrically coupled to one of said integrated circuit dies by said electrically conductive material, a second bonding pad electrically coupled to a third bonding pad of a second one of said interconnect dies by said electrically conductive material, and a wiring path coupling said first bonding pad to said second bonding pad; and    the second one of said interconnect dies comprises the third bonding pad, a fourth bonding pad electrically coupled to one of said electrically conductive leads by said electrically conductive material, and a wiring path coupling said third bonding pad to said fourth bonding pad.    
     
     
         19 . A multi-chip module according to  claim 12 , wherein said end plate comprises a heat sink material.  
     
     
         20 . A multi-chip module according to  claim 19 , wherein said end plate comprises copper.  
     
     
         21 . A multi-chip module according to  claim 12 , wherein each of said interconnect dies comprises a silicon substrate.  
     
     
         22 . A multi-chip module according to  claim 12 , wherein said interconnect dies comprise only passive components and said integrated circuit dies comprise active components.  
     
     
         23 . A multi-chip module according to  claim 12 , wherein said conductive leads extend through said side walls in multiple, vertically-spaced tiers.  
     
     
         24 . A multi-chip module for housing multiple integrated circuit dies comprising: 
 a housing including a plurality of insulative side walls and an end plate joined to the side walls to define a cavity;    a plurality of electrically conductive leads held in said side walls, each of said conductive leads including an internal lead section extending within the cavity and an external lead section extending outside of said housing;    first, second, third, and fourth integrated circuit dies mounted to said end plate within the cavity;    first, second, third, and fourth interconnect dies mounted to said end plate within the cavity, said first interconnect die mounted between said first and second integrated circuit dies, said second interconnect die mounted between said second and third integrated circuit dies, said third interconnect die mounted between said third and fourth integrated circuit dies, and said fourth interconnect die mounted between said first and fourth integrated circuit dies; and    electrically conductive material coupling said conductive leads and said interconnect dies, said conductive leads and said integrated circuit dies, and said integrated circuit dies and said interconnect dies.    
     
     
         25 . A multi-chip module according to  claim 24 , wherein said end plate comprises a heat sink material.  
     
     
         26 . A multi-chip module according to  claim 25 , wherein said end plate comprises copper.  
     
     
         27 . A multi-chip module according to  claim 24 , wherein each of said interconnect dies comprises a silicon substrate.  
     
     
         28 . A multi-chip module according to  claim 24 , wherein said interconnect dies comprise only passive components and said plurality of integrated circuit dies comprise active components.  
     
     
         29 . A multi-chip module according to  claim 24 , wherein said conductive leads extend through said side walls in multiple, vertically-spaced tiers.  
     
     
         30 . A multi-chip module according to  claim 24 , wherein housing includes four side walls joined together in a rectangular shape and said first, second, third, and fourth integrated circuit dies are mounted to the end plate adjacent the corners of the side walls, respectively.  
     
     
         31 . A multi-chip module according to claim  30 , wherein said interconnect dies are rectangular-shaped, and said first and third interconnect dies are positioned end-to-end with respect to each other and said second and fourth interconnect dies are positioned end-to-end with respect to each other and separate said first and third interconnect dies.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.