Patterning metal stack layers of magnetic switching device, utilizing a bilayer metal hardmask
Abstract
Patterning metal stack layers of a magnetic switching device to enable a critical lithography level to be made on planar substrate without any topography and enable a second lithography step without topography from a top patterned hardmask, comprising: a) depositing a magnetic tunnel junction stack over oxide layer containing metal transistors surrounded by Cu lines, in which a via connects pinned magnet to at least one metal transistor, forming a bilayer hardmask by depositing layer of TiN on magnetic tunnel junction stack and a layer of W on TiN; b) patterning a junction of the device by opening a portion of W hardmask over metal transistor with an etch stop on TiN hardmask, depositing a tunnel junction resist and developing a resist feature on top of hardmask; c) opening the remaining W hardmask and stripping remaining resist and etch residue; d) performing a metal etch to isolate one device from an adjacent device and depositing anti-reflective coating; e) transferring resist pattern into the TiN hardmask by opening the TiN hardmask and stripping any remaining resist and etch residue; f) patterning to isolate one device from an adjacent device to form a memory array by etching a portion of the top layer of the magnetic tunnel junction stack and opening the remaining portion of the TiN hardmask selective to the W hardmask that holds pattern for the device junction; and g) affecting junction pattern transfer using the W hardmask by performing a tunnel junction etch and capping the magnetic switching device by depositing Al and oxidizing the deposited aluminum to form a layer of Al 2 O 3 to getter corrosive residuals and passivate metal surface of device from oxidation and/or corrosion.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of patterning metal stack layers of a magnetic switching device to enable the critical lithography level to be made on a planar substrate without any topography and enable a second lithography step substantially without topography from a top patterned hardmask, comprising:
a) depositing a magnetic tunnel junction stack over an oxide layer containing metal transistors surrounded by Cu lines, in which a via connects a pinned magnet to at least one metal transistor, forming a bilayer hardmask by depositing a layer of TiN on the magnetic tunnel junction stack and a layer of W on the TiN layer; b) patterning a junction of said device by opening a portion of the W hardmask layer over said metal transistor with an etch stop on the TiN hardmask layer, depositing an anti-reflective coating (ARC), depositing a tunnel junction resist and developing a resist feature on top of said hardmask; c) opening the remaining W hardmask layer and stripping any remaining resist and etch residue; d) performing a metal etch to isolate one device from an adjacent device and depositing an anti-reflective coating; e) transferring the resist pattern into the TiN hardmask by opening the TiN hardmask and stripping any remaining resist and etch residue; f) patterning to isolate one device from an adjacent device to form a memory array by etching a portion of the top layer of the magnetic tunnel junction stack and opening the remaining portion of the TiN hardmask selective to the W hardmask that holds the pattern for the device junction; and g) affecting the junction pattern transfer using the W hardmask by performing a tunnel junction etch and capping the magnetic switching device by depositing Al and oxidizing said deposited aluminum to form a layer of Al 2 O 3 to getter corrosive residuals and passivate the metal surface of the device from oxidation and/or corrosion.
2 . The method of claim 1 wherein in step a) said magnetic tunnel junction stack comprises a buffer layer of TaN/Ta, a pinning layer of PtMn, and a pinned magnet of NiFe.
3 . The method of claim 2 wherein a tunnel barrier of alumina is formed on said pinned magnet.
4 . The method of claim 3 wherein a free magnetic layer of NiFe is formed over said tunnel barrier of alumina.
5 . The method of claim 4 wherein said free magnetic layer of NiFe is capped with a layer of Ta/TaN.
6 . The method of claim 2 wherein said pinned layer of PtMn is of thickness of from between about 175 to about 375 Å.
7 . The method of claim 6 wherein said pinned magnet of NiFe is of a thickness of from about 40 to about 60 A.
8 . The method of claim 7 wherein said tunnel barrier of alumina is of a thickness of from about 10 to about 18 Å.
9 . The method of claim 8 wherein said TiN hardmask layer is of a thickness of from about 1000 to about 2000 Å.
10 . The method of claim 9 wherein said W hardmask layer is of a thickness of from about 1000 to about 2000 Å.Join the waitlist — get patent alerts
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