Inventor · disambiguated record
Gregory Costrini
Also filed as: COSTRINI GREGORY
31 granted patents·13 pending applications·790 citations·filing 1989–2025
97Inventor score
Top patents by PatentIndex Score
44 records- 0198US6187680B1Method/structure for creating aluminum wirebound pad on copper BEOLIBM·Filed 1998·Granted Feb 13, 2001·353 cites·19 claims
- 0296US8008095B2Methods for fabricating contacts to pillar structures in integrated circuitsIBM·Filed 2007·Granted Aug 30, 2011·56 cites·16 claims
- 0389US9431395B2Protection of semiconductor-oxide-containing gate dielectric during replacement gate formationIBM·Filed 2014·Granted Aug 30, 2016·7 cites·10 claims
- 0489US6743642B2Bilayer CMP process to improve surface roughness of magnetic stack in MRAM technologyIBM·Filed 2002·Granted Jun 1, 2004·37 cites·10 claims
- 0588US7001783B2Mask schemes for patterning magnetic tunnel junctionsIBM·Filed 2004·Granted Feb 21, 2006·58 cites·20 claims
- 0688US6985384B2Spacer integration scheme in MRAM technologyIBM·Filed 2002·Granted Jan 10, 2006·41 cites·10 claims
- 0787US6333559B1Method/structure for creating aluminum wirebound pad on copper BEOLIBM·Filed 2000·Granted Dec 25, 2001·41 cites·15 claims
- 0884US6812141B1Recessed metal lines for protective enclosure in integrated circuitsINFINEON TECHNOLOGIES AG·Filed 2003·Granted Nov 2, 2004·39 cites·32 claims
- 0983US7097777B2Magnetic switching deviceIBM·Filed 2005·Granted Aug 29, 2006·9 cites·16 claims
- 1080US7875550B2Method and structure for self-aligned device contactsIBM·Filed 2008·Granted Jan 25, 2011·7 cites·18 claims
- 1179US9577068B2Protection of semiconductor-oxide-containing gate dielectric during replacement gate formationIBM·Filed 2016·Granted Feb 21, 2017·2 cites·17 claims
- 1276US7884396B2Method and structure for self-aligned device contactsIBM·Filed 2008·Granted Feb 8, 2011·5 cites·19 claims
- 1375US10733354B2System and method employing three-dimensional (3D) emulation of in-kerf optical macrosGLOBALFOUNDRIES INC·Filed 2018·Granted Aug 4, 2020·2 cites·20 claims
- 1475US6323127B1Capacitor formed with Pt electrodes having a 3D cup-like shape with roughened inner and outer surfacesIBM·Filed 2000·Granted Nov 27, 2001·21 cites·20 claims
- 1573US7605447B2Highly manufacturable SRAM cells in substrates with hybrid crystal orientationIBM·Filed 2005·Granted Oct 20, 2009·12 cites·12 claims
- 1671US7374952B2Methods of patterning a magnetic stack of a magnetic memory cell and structures thereofINFINEON TECHNOLOGIES AG·Filed 2004·Granted May 20, 2008·16 cites·37 claims
- 1771US6680500B1Insulating cap layer and conductive cap layer for semiconductor devices with magnetic material layersINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jan 20, 2004·18 cites·11 claims
- 1870US7470615B2Semiconductor structure with self-aligned device contactsIBM·Filed 2006·Granted Dec 30, 2008·3 cites·12 claims
- 1969US6686296B1Nitrogen-based highly polymerizing plasma process for etching of organic materials in semiconductor manufacturingIBM·Filed 2000·Granted Feb 3, 2004·13 cites·23 claims
- 2068US7871893B2Method for non-selective shallow trench isolation reactive ion etch for patterning hybrid-oriented devices compatible with high-performance highly-integrated logic devicesIBM·Filed 2008·Granted Jan 18, 2011·4 cites·13 claims
- 2164US4933302AFormation of laser mirror facets and integration of optoelectronicsIBM·Filed 1989·Granted Jun 12, 1990·14 cites·20 claims
- 2264US2025338465A1Method and material system for backside power delivery network in static random-access memory devicesAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 2363US6319840B1For mol integrationIBM·Filed 2000·Granted Nov 20, 2001·12 cites·17 claims
- 2462US6974770B2Self-aligned mask to reduce cell layout areaIBM·Filed 2003·Granted Dec 13, 2005·10 cites·19 claims
- 2561US2025040170A1Isolation module for backside power deliveryAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 2660US7923840B2Electrically conductive path forming below barrier oxide layer and integrated circuitIBM·Filed 2007·Granted Apr 12, 2011·1 cites·13 claims
- 2759US2025311383A1Source-Drain Isolation for Complementary Field Effect TransistorsAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 2859US2024332388A1Methods of reducing backside contact resistanceAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 2959US2025338598A1Isolation module for backside power deliveryAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 3057US2025212496A1Isolation formation method in high-aspect ratio cmos stacked devicesAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 3157US2025212458A1Bottom-up dielectric gap-fill for device isolation during source/drain epitaxy in cfetAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 3254US2025331284A1Sequential self-aligning method in complementary field effect transistor devicesAPPLIED MATERIALS INC·Filed 2025·Application pending·0 cites
- 3353US10177154B2Structure and method to prevent EPI short between trenches in FinFET eDRAMIBM·Filed 2017·Granted Jan 8, 2019·0 cites·19 claims
- 3452US5587045AGettering of particles from an electro-negative plasma with insulating chuckIBM·Filed 1995·Granted Dec 24, 1996·8 cites·5 claims
- 3551US8039888B2Conductive spacers for semiconductor devices and methods of formingIBM·Filed 2007·Granted Oct 18, 2011·0 cites·8 claims
- 3649US9818741B2Structure and method to prevent EPI short between trenches in FINFET eDRAMIBM·Filed 2015·Granted Nov 14, 2017·0 cites·13 claims
- 3749US2025218870A1Self-aligning backside gate connectionAPPLIED MATERIALS INC·Filed 2025·Application pending·0 cites
- 3848US11158633B1Multi-level isolation structureGLOBALFOUNDRIES US INC·Filed 2020·Granted Oct 26, 2021·0 cites·18 claims
- 3947US2005146927A1Spacer integration scheme in MRAM technologyFiled 2005·Application pending·0 cites
- 4046US2007249133A1Conductive spacers for semiconductor devices and methods of formingIBM·Filed 2006·Application pending·0 cites
- 4146US2009090974A1Dual stress liner structure having substantially planar interface between liners and related methodIBM·Filed 2007·Application pending·0 cites
- 4242US8563398B2Electrically conductive path forming below barrier oxide layer and integrated circuitCOSTRINI GREGORY·Filed 2010·Granted Oct 22, 2013·0 cites·9 claims
- 4342US2004084400A1Patterning metal stack layers of magnetic switching device, utilizing a bilayer metal hardmaskFiled 2002·Application pending·0 cites
- 4433US5843800AGettering of particles from an electro-negative plasma with insulating chuckIBM·Filed 1996·Granted Dec 1, 1998·1 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →