Surface mount package
Abstract
Space-efficient packaging of microelectronic devices permits greater functionality per unit PC board surface area. In certain embodiments, packages having leads of a reverse gull wing shape reduce peripheral footprint area occupied by the leads, thereby permitting maximum space in the package footprint to be allocated to the package body and to the enclosed die. Embodiments of packages in accordance with the present invention may also reduce the package vertical profile by featuring recesses for receiving lead feet ends, thereby reducing clearance between the package bottom and the PC board. Providing a linear lead foot underlying the package and slightly inclined relative to the PC board further reduces vertical package profile by eliminating additional clearance associated with radiuses of curvature of J-shaped leads.
Claims
exact text as granted — not AI-modified1 - 7 . (canceled)
8 . A small footprint semiconductor device package comprising:
a package body enclosing a die having an area; and a lead including an enclosed portion enclosed by the package body and in electrical communication with the die, and an exposed portion of the lead extending from the side of the package body and folding back along the side of the package toward the bottom of the package, and folding toward a center of the bottom of the package to form a lead foot, a combined width and length of the package body and the exposed lead portion defining a lateral footprint area, such that the die area occupies 40% or more of the footprint area.
9 . The package of claim 8 wherein the exposed portion of the lead folds toward a center of the bottom of the package to form a rounded lead foot exhibiting a clearance from an underlying PC board defined by a radius of curvature of the foot.
10 . The package of claim 8 wherein the exposed portion of the lead folds toward a center of the bottom of the package to form a linear lead foot inclined at a second angle relative to an underlying PC board.
11 . The package of claim 10 wherein the package body exhibits a thickness 90% or greater than a vertical profile of the package.
12 . A small footprint semiconductor device package comprising:
a package body enclosing a die having an area; and a lead including, an enclosed portion by the package body, the enclosed portion integral with a die pad supporting the die, the enclosed portion in electrical communication with the die, and an exposed portion of the lead extending from the side of the package body, folding back along the side of the package toward the bottom of the package, and folding toward a center of the bottom of the package to form a lead foot; a combined width and length of the package body and the exposed lead portion defining a lateral footprint area, such that the die area occupies about 40% or more of the footprint area and the enclosed lead portion draws heat away from the operating die to the exposed lead portion, with the exposed lead portion dissipating the heat.
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