US2005167812A1PendingUtilityA1

Semiconductor device, three-dimensional semiconductor device, and method of manufacturing semiconductor device

Assignee: FUJITSU LTDPriority: Jan 15, 2003Filed: Feb 23, 2005Published: Aug 4, 2005
Est. expiryJan 15, 2023(expired)· nominal 20-yr term from priority
H10W 90/724H10W 90/722H10W 90/297H10W 90/20H10W 74/00H10W 72/9415H10W 72/5522H10W 72/944H10W 72/834H10W 72/252H10W 72/244H10W 72/221H10W 72/29H10W 72/01H10W 70/65H10W 90/00H10W 74/117H10W 20/20H10W 20/0234H10W 20/0242H10W 20/023
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Claims

Abstract

A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising: 
 a substrate that has first and second surfaces;    an integrated circuit unit and an electrode pad on the first surface; and    a lead-out unit that has one end electrically connected to the bottom surface of the electrode pad and the other end exposed to the second surface of the substrate, the electrode pad being electrically led out to the second surface of the substrate, the lead-out unit being formed in a hole that is in the form of a concavity extending from the second surface of the substrate and penetrating the substrate, the bottom surface of the electrode pad being exposed through the bottom of the hole.    
   
   
       2 . A semiconductor device comprising: 
 a substrate that has first and second surfaces;    an integrated circuit unit, an electrode pad, and a select terminal that are formed on the first surface;    a lead-out unit that has one end electrically connected to the bottom surface of the electrode pad and the other end exposed to the second surface of the substrate, the electrode pad being electrically led out to the second surface of the substrate, the lead-out unit being formed in a hole that is in the form of a concavity extending from the second surface of the substrate and penetrating the substrate, the bottom surface of the electrode pad being exposed through the bottom of the hole; and    a side-surface electrode pad that is formed on a side surface of the substrate and is electrically connected to the select terminal.    
   
   
       3 . The semiconductor device as claimed in  claim 1 , wherein the lead-out unit is formed with a conductive material that fills the hole.  
   
   
       4 . The semiconductor device as claimed in  claim 1 , wherein the lead-out unit is formed with a conductor material that is formed along the inner wall surface of the hole.  
   
   
       5 . The semiconductor device as claimed in  claim 1 , wherein the hole in the substrate has a tapered structure, having a smaller diameter at the bottom than the diameter of the opening on the second surface.  
   
   
       6 . The semiconductor device as claimed in  claim 1 , wherein the substrate is thinner than original crystals.  
   
   
       7 . The semiconductor device as claimed in  claim 1 , further comprising 
 a wire that is formed on the first surface of the substrate and is electrically connected to the lead-out unit, or a wire that is formed on the second surface of the substrate and is electrically connected to the electrode pad.    
   
   
       8 . A three-dimensional semiconductor device comprising: 
 a plurality of semiconductor devices that are stacked on one another, the semiconductor devices each comprising:    a substrate that has first and second surfaces;    an integrated circuit unit and an electrode pad on the first surface; and    a lead-out unit that has one end electrically connected to the bottom surface of the electrode pad and the other end exposed to the second surface of the substrate, the electrode pad being electrically led out to the second surface of the substrate, the lead-out unit being formed in a hole that is in the form of a concavity extending from the second surface of the substrate and penetrating the substrate, the bottom surface of the electrode pad being exposed through the bottom of the hole,    the electrode pads of the semiconductor devices being electrically connected to one another.    
   
   
       9 . A three-dimensional semiconductor device comprising: 
 a plurality of semiconductor devices that are stacked on one another, the semiconductor devices each comprising:    a substrate that has first and second surfaces;    an integrated circuit unit, an electrode pad, and a select terminal that are formed on the first surface; and    a lead-out unit that has one end electrically connected to the bottom surface of the electrode pad and the other end exposed to the second surface of the substrate, the electrode pad being electrically led out to the second surface of the substrate, the lead-out unit being formed in a hole that is in the form of a concavity extending from the second surface of the substrate and penetrating the substrate, the bottom surface of the electrode pad being exposed through the bottom of the hole; and    a side-surface electrode pad that is formed on a side surface of the substrate and is electrically connected to the select terminal,    the electrode pads of the semiconductor devices being electrically connected to one another,    the three-dimensional semiconductor device further comprising:    a plurality of external select terminals to which a signal for designating a semiconductor device among the semiconductor devices is input; and    a semiconductor device designating unit that includes parts that electrically connect the side-surface electrode pads, the semiconductor device designating unit electrically connecting each of the external select terminals only to the select terminal of a designated semiconductor device among the semiconductor devices, the semiconductor device designating unit being located on a side surface of the three-dimensional semiconductor device.    
   
   
       10 . The three-dimensional semiconductor device as claimed in  claim 9 , wherein: 
 each of the stacked semiconductor devices is part of the semiconductor device designating unit, the stacked semiconductor devices having semiconductor designating parts that are different from one another; and    the semiconductor device designating unit is formed by electrically connecting the semiconductor designating parts of the stacked semiconductor devices.    
   
   
       11 . The three-dimensional semiconductor device as claimed in  claim 9 , wherein: 
 each of the stacked semiconductor devices is part of the semiconductor device designating unit, the stacked semiconductor devices having semiconductor designating parts that are different from one another; and    the semiconductor device designating unit is formed by electrically connecting the semiconductor designating parts of the stacked semiconductor devices, and short-circuiting or cutting off a predetermined portion, or short-circuiting and cutting off a predetermined portion.    
   
   
       12 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming an integrated circuit unit and an electrode pad on a first surface of a wafer that has the first surface and a second surface on opposite sides;    bonding the first surface of the wafer to a supporting plate member, and thinning the wafer by grinding the second surface of the wafer;    forming a hole by etching the second surface of the thinned wafer, the hole penetrating the wafer and exposing the bottom surface of the electrode pad at the bottom;    forming a lead-out unit in the hole, the lead-out unit having one end electrically connected to the bottom surface of the electrode pad and the other end exposed to the second surface of the wafer, the electrode pad thus being electrically led out to the second surface of the wafer; and    removing the supporting plate member after forming the lead-out unit.    
   
   
       13 . The method as claimed in  claim 12 , wherein the hole is formed by performing etching, with the electrode pad serving as an etching stopper layer.

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