Semiconductor integrated circuit device and a methodof manufacturing the same

Abstract

A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width of the side wall layer, a high concentration region in contact with the LDD portion and a metal silicide layer in the high concentration region.

1 . A semiconductor integrated circuit device comprising: 
 a first semiconductor region and a second semiconductor region separated from each other on a principal surface of a semiconductor;    a first MISFET with source and drain regions having an LDD structure constituted by a low concentration region and a high concentration region formed in said first semiconductor region wherein a depth of said high concentration region of said first MISFET is greater than a depth of said low concentration region of said first MISFET; and    a second MISFET with source and drain regions having an LDD structure constituted by a low concentration region and a high concentration region formed in said second semiconductor region wherein a depth of said high concentration region of said second MISFET is greater than a depth of said low concentration region of said second MISFET,    wherein a conductivity type of said source and drain region of said first MISFET is the same as a conductivity type of said source and drain of said second MISFET,    wherein an offset length of the low concentration region of said second MISFET is greater than an offset length of the low concentration region of said first MISFET, and    wherein a metal-semiconductor reaction layer is formed over the surface of the high concentration region of each of said first and second MISFETs.    
   
   
       2 . A semiconductor integrated circuit device according to  claim 1 , wherein said metal-semiconductor reaction layers are made of cobalt silicide.