Alignment fences and devices and assemblies including the same

Abstract

A fence is configured to receive and align a semiconductor device, such as a flip-chip type semiconductor device, with a substrate. The fence may include a plurality of adjacent, mutually adhered regions, which may comprise layers. One or more laterally recessed regions may be located at one or more corners of a receptacle formed by the fence to facilitate rough alignment of a semiconductor device with the substrate. The receptacle of the fence may include edges that are configured to progressively align a semiconductor device with the substrate.

1 . A substrate configured to have a semiconductor device at least temporarily electrically connected thereto, comprising: 
 a substantially planar member;    a first array of contacts exposed at a surface of the substantially planar member; and    a fence including a receptacle for receiving the semiconductor device, the receptacle including at least one laterally recessed area in a corner thereof for receiving a corner of a semiconductor device.    
   
   
       2 . The substrate of  claim 1 , wherein the at least one laterally recessed area is configured to facilitate rough alignment of the semiconductor device with the substrate.  
   
   
       3 . The substrate of  claim 1 , wherein the fence includes at least two laterally recessed areas at corners of the receptacle.  
   
   
       4 . The substrate of  claim 3 , wherein the at least two laterally recessed areas are located at opposite corners of the receptacle.  
   
   
       5 . The substrate of  claim 1 , wherein the fence comprises at least one protective layer extending over at least a portion of at least one of the surface and another, opposite surface of the substantially planar member.  
   
   
       6 . The substrate of  claim 1 , wherein the contacts of the first array comprise conductive structures that protrude above the surface.  
   
   
       7 . The substrate of  claim 1 , wherein the receptacle comprises tapered walls configured to progressively guide bond pads or conductive structures of a semiconductor device introduced into the receptacle into alignment with corresponding contacts of the first array.  
   
   
       8 . The substrate of  claim 1 , wherein selected contacts of the first array are recessed below the surface.  
   
   
       9 . The substrate of  claim 8 , further comprising: 
 at least one knife-edged spine protruding into a recess above each of the selected contacts, the at least one knife-edged spine being configured to pierce a conductive structure of the semiconductor device upon assembly with the substrate.    
   
   
       10 . The substrate of  claim 9 , wherein the at least one knife-edged spine comprises metal or a metallized surface.  
   
   
       11 . The substrate of  claim 10 , wherein metal of the at least one knife-edged spine communicates with a corresponding one of the selected contacts.  
   
   
       12 . The substrate of  claim 1 , wherein the fence extends onto at least a portion of at least one peripheral edge of the substantially planar member.  
   
   
       13 . A fence configured for use with a substantially planar substrate, comprising: 
 a plurality of adjacent, mutually adhered regions; and    a receptacle defined by the plurality of adjacent, mutually adhered regions and including at least one side wall configured to progressively guide contact pads of at least one semiconductor device structure into alignment with corresponding contacts of the substantially planar substrate.    
   
   
       14 . The fence of  claim 13 , wherein the plurality of adjacent, mutually adhered regions comprises a plurality of at least partially superimposed, contiguous, mutually adhered layers.  
   
   
       15 . The fence of  claim 13 , wherein each of the plurality of adjacent, mutually adhered regions comprises dielectric material.  
   
   
       16 . The fence of  claim 15 , wherein the dielectric material comprises a polymer.  
   
   
       17 . The fence of  claim 16 , wherein the polymer comprises a photopolymer.  
   
   
       18 . The fence of  claim 13 , comprising at least one protective layer extending over at least a portion of at least one of the surface and another, opposite surface of the substantially planer substrate.  
   
   
       19 . The fence of  claim 13 , wherein the at least one wall comprises a tapered wall.  
   
   
       20 . The fence of  claim 13 , further comprising: 
 a downwardly protruding member configured to extend onto at least a portion of at least one peripheral edge of the substantially planar substrate.    
   
   
       21 . The fence of  claim 13 , wherein the receptacle includes a laterally recessed area in at least one corner thereof.  
   
   
       22 . The fence of  claim 21 , wherein the laterally recessed area facilitates adjustment of a position of the semiconductor device structure within the receptacle.