US2006231902A1PendingUtilityA1

LOCOS trench isolation structures

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Assignee: GONZALEZ FERNANDOPriority: Aug 22, 1997Filed: Jun 14, 2006Published: Oct 19, 2006
Est. expiryAug 22, 2017(expired)· nominal 20-yr term from priority
H10W 10/0128H10W 10/13H10W 10/012Y10S148/05
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Claims

Abstract

Isolation structures having trenches formed on both sides of a LOCOS structure are disclosed. A semiconductor structure pad oxide layer is enlarged by local oxidation of silicon to form a field oxide. An etchback causes the thinnest portions of the field oxide to recede, such that a portion of the semiconductor substrate is exposed. An etch, through the exposed portion of the semiconductor substrate, forms a microtrench between the field oxide and the nitride layer with a lateral dimension that is less than that currently achievable by conventional photolithography. In another embodiment, formation of the microtrench is carried out as set forth above, but the nitride layer is immediately removed following trench formation. Alternatively, the pad oxide layer is stripped and a new oxide layer is regrown that substantially covers all exposed surfaces of active areas of the semiconductor substrate.

Claims

exact text as granted — not AI-modified
1 . An isolation structure of a semiconductor device comprising: 
 a trench extending between a gate oxide layer and a field oxide region in a semiconductor substrate, the trench being filled with a dielectric material comprising a nitride;    a spacer situated on a lateral surface of the field oxide region and a lateral surface of the gate oxide layer, the spacer comprising a dielectric material an intersection of the trench with the top surface of the semiconductor substrate having a first edge opposite a second edge; the field oxide region in contact with the first edge; and    a gate oxide layer in contact with the second edge.    
   
   
       2 . An isolation structure in a semiconductor structure that includes a pad oxide layer upon a semiconductor substrate having a top surface and an oxidation barrier layer upon the pad oxide layer, wherein the oxidation barrier layer has a lateral surface thereon, the isolation structure comprising: 
 a trench extending between the oxidation barrier layer and a region in the semiconductor substrate, the trench being filled dielectric material comprising a nitride; and    a spacer composed of a second dielectric material, different from the first dielectric material, the spacer situated on the lateral surface of the oxidation barrier layer.    
   
   
       3 . The isolation structure of  claim 2 , wherein the second dielectric material comprises an oxide.  
   
   
       4 . The isolation structure of  claim 2 , further comprising a dopant at a bottom of the trench.  
   
   
       5 . The isolation structure of  claim 2 , wherein: 
 the trench extends within the semiconductor substrate below the top surface of the semiconductor substrate; and    the trench has a maximum width of less than about 2,000 Å at an intersection with the top surface of the semiconductor substrate.    
   
   
       6 . The isolation structure of  claim 2 , wherein the first dielectric material extends above the top surface of the semiconductor substrate.  
   
   
       7 . An isolation structure comprising: 
 a semiconductor substrate having a first active region and a separate second active region each of the first and second active regions extending to a top surface of the semiconductor substrate;    a field oxide region having a convex top surface opposite a convex bottom surface, wherein the convex bottom surface extends within the semiconductor substrate below the top surface of the semiconductor substrate to a first depth, the field oxide region is separated from the first and second separate active regions, and the convex top surface extends above the top surface of the semiconductor substrate;    a first isolation trench extending into the semiconductor substrate, the first isolation trench filled with a dielectric material comprising a nitride, and having a first spacer formed thereto, the first spacer extending above the top surface of the semiconductor substrate, wherein: 
 the first isolation trench has first and second opposite sides;  
 the first side of the first isolation trench in contact with the field oxide region; and  
 the second side of the first isolation trench in contact with the first active region; and  
   a second isolation trench extending into the semiconductor substrate, the second isolation trench filled with a dielectric material comprising a nitride and having a second spacer formed thereto, the second spacer extending above the top surface of the semiconductor substrate, wherein: 
 the second isolation trench has first and second opposite sides;  
 the first side of the second isolation trench in contact with the field oxide region; and  
 the second side of the second isolation trench in contact with the second active region.  
   
   
   
       8 . An isolation structure, comprising: 
 a semiconductor substrate comprising a semiconductive material and having first and second separate active regions each extending to a top surface of the semiconductor substrate;    a field oxide region having a curved top surface and an opposite curved bottom surface, wherein: 
 the curved bottom surface projects within the semiconductor substrate below the top surface of the semiconductor substrate;  
 the field oxide region is separated from the first and second separate active regions; and  
 the curved top surface projects above the top surface of the semiconductor substrate;  
   a pair of nitride dielectric extensions each: 
 having opposite first and second sides;  
 projecting within and in contact with the semiconductive material of the semiconductor substrate below the top surface of the semiconductor substrate;  
 contacting a respective active region on the first side thereof;  
 being out of contact from one of an active region on the second side thereof; and  
 projecting above the top surface of the semiconductor substrate; and  
   a pair of layers each of which: 
 is upon a respective one of the active regions; and 
 intersects a respective one of the dielectric extensions on one of the opposite sides of the field oxide region; wherein each of the dielectric extensions constitutes a structural barrier between the opposite first and second sides, configured to prevent the contact with a respective one of the active regions and the field oxide region, and configured to prevent the encroachment of material from the field oxide region into the respective active region.  
 
   
   
   
       9 . An isolation structure including a semiconductor substrate having a plurality of active regions extending to a top surface of the semiconductor substrate, the isolation structure comprising: 
 a pair of dielectric trench structures comprising a nitride, each of the pair of dielectric trench structures in contact with one of the active regions and extending below and above the top surface of the semiconductor substrate and respectively lower and higher than a field oxide region within the semiconductor substrate, wherein the field oxide region is physically separate from the plurality of active regions, is longer than it is high, and has opposite sides each of which makes contact with a respective one of the trench structures; and    oxide layers upon the active regions and making contact with the field oxide region.    
   
   
       10 . An isolation structure including a semiconductor substrate having a plurality of active regions and a top surface of the semiconductor substrate, the isolation structure comprising: 
 a pair of dielectric trench structures each of which: 
 including a top portion comprising a nitride upon a bottom portion comprising an oxide;  
 in contact with one of the active regions;  
 extending below the top surface of the semiconductor substrate to a first depth; and  
 extending above the top surface of the semiconductor substrate to a first height;  
   a field oxide region extending into the semiconductor substrate to a second depth less than the first depth, wherein the field oxide region: 
 extends above the top surface of the semiconductor substrate to a second height;  
 is physically separate from the plurality of active regions;  
 is longer than it is high; and  
 has opposite sides each of which makes contact with the nitride of a respective one of the dielectric trench structures; and  
   oxide layers upon each of the active regions and making contact with the field oxide region.    
   
   
       11 . The isolation structure of  claim 10 , wherein the first height is greater than the second height.

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