Inventor · disambiguated record
Mike Violette
Also filed as: VIOLETTE MIKE · VIOLETTE MIKE P
46 granted patents·3 pending applications·992 citations·filing 1996–2016
98Inventor score
Top patents by PatentIndex Score
49 records- 0199US6376284B1Method of fabricating a memory deviceMICRON TECHNOLOGY INC·Filed 2000·Granted Apr 23, 2002·365 cites·14 claims
- 0297US6369431B1Method for forming conductors in semiconductor devicesMICRON TECHNOLOGY INC·Filed 2000·Granted Apr 9, 2002·91 cites·2 claims
- 0396US7800092B2Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and usingMICRON TECHNOLOGY INC·Filed 2006·Granted Sep 21, 2010·38 cites·31 claims
- 0494US7745231B2Resistive memory cell fabrication methods and devicesMICRON TECHNOLOGY INC·Filed 2007·Granted Jun 29, 2010·18 cites·30 claims
- 0594US6653733B1Conductors in semiconductor devicesMICRON TECHNOLOGY INC·Filed 1996·Granted Nov 25, 2003·88 cites·1 claims
- 0693US7952919B2Phase change memory structure with multiple resistance states and methods of programming and sensing sameMICRON TECHNOLOGY INC·Filed 2010·Granted May 31, 2011·16 cites·18 claims
- 0793US7859893B2Phase change memory structure with multiple resistance states and methods of programming and sensing sameMICRON TECHNOLOGY INC·Filed 2007·Granted Dec 28, 2010·25 cites·25 claims
- 0893US7684227B2Resistive memory architectures with multiple memory cells per access deviceMICRON TECHNOLOGY INC·Filed 2007·Granted Mar 23, 2010·17 cites·57 claims
- 0993US6700211B2Method for forming conductors in semiconductor devicesMICRON TECHNOLOGY INC·Filed 2002·Granted Mar 2, 2004·44 cites·1 claims
- 1092US6670713B2Method for forming conductors in semiconductor devicesMICRON TECHNOLOGY INC·Filed 2002·Granted Dec 30, 2003·42 cites·4 claims
- 1190US7397689B2Resistive memory deviceMICRON TECHNOLOGY INC·Filed 2006·Granted Jul 8, 2008·19 cites·16 claims
- 1285US6563220B2Method for forming conductors in semiconductor devicesMICRON TECHNOLOGY INC·Filed 2002·Granted May 13, 2003·22 cites·11 claims
- 1383US7773492B2Method and apparatus providing high density data storageMICRON TECHNOLOGY INC·Filed 2006·Granted Aug 10, 2010·4 cites·35 claims
- 1483US6723597B2Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising sameMICRON TECHNOLOGY INC·Filed 2002·Granted Apr 20, 2004·24 cites·45 claims
- 1580US8193521B2Resistive memory cell fabrication methods and devicesLIU JUN·Filed 2010·Granted Jun 5, 2012·3 cites·47 claims
- 1680US6534866B1Dual damascene interconnectMICRON TECHNOLOGY INC·Filed 2000·Granted Mar 18, 2003·18 cites·16 claims
- 1778US6893957B2Method of forming a dual damascene interconnect by selective metal depositionMICRON TECHNOLOGY INC·Filed 2002·Granted May 17, 2005·16 cites·16 claims
- 1878US6812529B2Suppression of cross diffusion and gate depletionMICRON TECHNOLOGY INC·Filed 2001·Granted Nov 2, 2004·19 cites·38 claims
- 1976US8681529B2Apparatuses and operation methods associated with resistive memory cell arrays with separate select linesLIU ZENGTAO T·Filed 2011·Granted Mar 25, 2014·4 cites·16 claims
- 2074US8241947B2Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using sameLIU JUN·Filed 2010·Granted Aug 14, 2012·3 cites·18 claims
- 2172US6489665B2Lateral bipolar transistorMICRON TECHNOLOGY INC·Filed 2000·Granted Dec 3, 2002·11 cites·25 claims
- 2270US7545669B2Resistive memory deviceMICRON TECHNOLOGY INC·Filed 2008·Granted Jun 9, 2009·5 cites·23 claims
- 2370US6724089B2Dual damascene interconnectMICRON TECHNOLOGY INC·Filed 2002·Granted Apr 20, 2004·9 cites·21 claims
- 2468US6594172B2Method of selectively forming local interconnects using design rulesMICRON TECHNOLOGY INC·Filed 2001·Granted Jul 15, 2003·11 cites·6 claims
- 2567US7087468B2Method for forming conductors in semiconductor devicesMICRON TECHNOLOGY INC·Filed 2002·Granted Aug 8, 2006·7 cites·22 claims
- 2666US6535413B1Method of selectively forming local interconnects using design rulesMICRON TECHNOLOGY INC·Filed 2000·Granted Mar 18, 2003·10 cites·48 claims
- 2763US8076195B2Resistive memory architectures with multiple memory cells per access deviceLIU JUN·Filed 2010·Granted Dec 13, 2011·1 cites·3 claims
- 2863US6127236AMethod of forming a lateral bipolar transistorMICRON TECHNOLOGY INC·Filed 1998·Granted Oct 3, 2000·14 cites·28 claims
- 2958US9378818B2Apparatuses and operation methods associated with resistive memory cell arrays with separate select linesMICRON TECHNOLOGY INC·Filed 2014·Granted Jun 28, 2016·1 cites·20 claims
- 3057US6962841B2Suppression of cross diffusion and gate depletionMICRON TECHNOLOGY INC·Filed 2003·Granted Nov 8, 2005·6 cites·33 claims
- 3156US8835893B2Resistive memory cell fabrication methods and devicesLIU JUN·Filed 2012·Granted Sep 16, 2014·0 cites·23 claims
- 3256US6900494B2Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising sameMICRON TECHNOLOGY INC·Filed 2004·Granted May 31, 2005·5 cites·18 claims
- 3354US8659002B2Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using sameLIU JUN·Filed 2012·Granted Feb 25, 2014·0 cites·21 claims
- 3454US5945726ALateral bipolar transistorMICRON TECHNOLOGY INC·Filed 1996·Granted Aug 31, 1999·9 cites·22 claims
- 3552US8189450B2Method and apparatus providing high density chalcogenide-based data storageLIU JUN·Filed 2010·Granted May 29, 2012·0 cites·33 claims
- 3652US8022385B2Memory devices with buried linesMICRON TECHNOLOGY INC·Filed 2006·Granted Sep 20, 2011·0 cites·20 claims
- 3750US8976562B2Resistive memory architectures with multiple memory cells per access deviceLIU JUN·Filed 2011·Granted Mar 10, 2015·0 cites·11 claims
- 3850US7859888B2Resistive memory deviceMICRON TECHNOLOGY INC·Filed 2009·Granted Dec 28, 2010·1 cites·23 claims
- 3950US2006231902A1LOCOS trench isolation structuresGONZALEZ FERNANDO·Filed 2006·Application pending·0 cites
- 4049US9548335B2Apparatuses and operation methods associated with resistive memory cell arrays with separate select linesMICRON TECHNOLOGY INC·Filed 2016·Granted Jan 17, 2017·0 cites·20 claims
- 4148US6930901B2Method of selectively forming local interconnects using design rulesMICRON TECHNOLOGY INC·Filed 2002·Granted Aug 16, 2005·2 cites·5 claims
- 4246US6090685AMethod of forming a LOCOS trench isolation structureMICRON TECHNOLOGY INC·Filed 1997·Granted Jul 18, 2000·9 cites·48 claims
- 4346US2005266666A1Suppression of cross diffusion and gate depletionTRIVEDI JIGISH D·Filed 2005·Application pending·0 cites
- 4443US2005012158A1Locos trench isolation structureMICRON TECHNOLOGY INC·Filed 2004·Application pending·0 cites
- 4542US6166426ALateral bipolar transistors and systems using suchMICRON TECHNOLOGY INC·Filed 1999·Granted Dec 26, 2000·4 cites·10 claims
- 4637US6809395B1Isolation structure having trench structures formed on both side of a locosMICRON TECHNOLOGY INC·Filed 1999·Granted Oct 26, 2004·4 cites·1 claims
- 4736US5965923ALateral bipolar transistor and apparatus using sameMICRON TECHNOLOGY INC·Filed 1998·Granted Oct 12, 1999·2 cites·22 claims
- 4836US5654227AMethod for local oxidation of silicon (LOCOS) field isolationMICRON TECHNOLOGY INC·Filed 1996·Granted Aug 5, 1997·4 cites·29 claims
- 4931US6090727AMethod for local oxidation of silicon (LOCOS) field isolationMICRON TECHNOLOGY INC·Filed 1997·Granted Jul 18, 2000·1 cites·32 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →