Method for a low profile multi-IC chip package connector

Abstract

A method for a low profile multi-IC chip package for high-speed applications comprises a connector for electrically connecting the equivalent outer leads of a set of stacked primary semiconductor packages. In one embodiment, the connector comprises a two-part sheet of flexible insulative polymer with buses formed on one side. In another embodiment, the connector comprises multiple buses formed from conductive polymer. In further embodiments, the primary packages are stacked within a cage and have their outer leads in unattached contact with buses within the cage or, alternatively, are directly fixed to leads or pads on the host circuit board.

1 . A method for connecting a stacked plurality of integrated circuit packages on a substrate having a plurality of circuits thereon using a cage, each integrated circuit package of the stacked plurality having a plurality of outer leads and having a plurality of sides, comprising: 
 enclosing at least three sides of the plurality of sides of each integrated circuit package of the stacked plurality of integrated circuit packages using the cage; and    attaching the cage to the substrate using one of adhesive and snap pins fitting in holes in the substrate, the cage connecting at least one outer lead of the plurality of outer leads of the stacked plurality of integrated circuit packages to at least one conductive bus of a plurality of spaced transverse conductive buses, with a portion of a semi-continuous flexible tape located within the cage.    
   
   
       2 . A stacking method for a plurality of integrated circuit packages on a substrate having a plurality of circuits thereon using a cage, each integrated circuit package of the plurality having a plurality of outer leads and having a plurality of sides, comprising: 
 enclosing at least three sides of the plurality of sides of each integrated circuit package of the plurality of integrated circuit packages using the cage; and    attaching the cage to the substrate using one of adhesive and snap pins fitting in holes in the substrate, the cage connecting at least one outer lead of the plurality of outer leads of the plurality of integrated circuit packages to at least one conductive bus of a plurality of spaced transverse conductive buses, with a portion of a semi-continuous flexible tape located within the cage.    
   
   
       3 . A stacking method for integrated circuit packages on a substrate having a plurality of circuits thereon using a cage, each integrated circuit package having a plurality of outer leads and having a plurality of sides, comprising: 
 enclosing at least three sides of the plurality of sides of each integrated circuit package of the integrated circuit packages using the cage; and    attaching the cage to the substrate using one of adhesive and snap pins fitting in holes in the substrate, the cage connecting at least one outer lead of the plurality of outer leads of the integrated circuit packages to at least one conductive bus of a plurality of spaced transverse conductive buses, with a portion of a semi-continuous flexible tape located within the cage.    
   
   
       4 . An assembly method for integrated circuit packages on a substrate having a plurality of circuits thereon using a cage, each integrated circuit package having a plurality of outer leads and having a plurality of sides, comprising: 
 enclosing at least three sides of the plurality of sides of each integrated circuit package of the integrated circuit packages in the cage; and    attaching the cage to the substrate using one of adhesive and snap pins fitting in holes in the substrate, the cage connecting at least one outer lead of the plurality of outer leads of the integrated circuit packages to at least one conductive bus of a plurality of spaced transverse conductive buses, with a portion of a semi-continuous flexible tape located within the cage.