Microelectronic assemblies having low profile connections
Abstract
A microelectronic assembly includes a first microelectronic element having a first face and contacts accessible at the first face, and a layer of a dielectric material having a bottom surface contacting the first microelectronic element, a top surface facing away from the first microelectronic element and holes extending between the top and bottom faces in alignment with the contacts on the first microelectronic element. The assembly includes conductive protrusions extending through the holes to the contacts, the conductive protrusions projecting beyond the top surface of the dielectric layer. The assembly also has a second microelectronic element having a first surface with conductive elements being accessible at the first surface thereof, the second microelectronic element being assembled with the first microelectronic element so that the contacts of the second microelectronic element are connected with the conductive protrusions and the top surface of the dielectric layer is spaced from the first surface of the second microelectronic element.
Claims
exact text as granted — not AI-modified1 . A microelectronic assembly comprising:
a first microelectronic element having a first face and contacts accessible at said first face; a layer of a dielectric material having a bottom surface contacting said first microelectronic element, a top surface facing away from said first microelectronic element and holes extending between said top and bottom faces in alignment with said contacts on said first microelectronic element; conductive protrusions extending through said holes to said contacts, said conductive protrusions projecting beyond said top surface of said dielectric layer; a second microelectronic element having a first surface with conductive elements being accessible at said first surface thereof, said second microelectronic element being assembled with said first microelectronic element so that said contacts of said second microelectronic element are connected with said conductive protrusions with said top surface of said dielectric layer being spaced from said first surface of said second microelectronic element.
2 . The microelectronic assembly as claimed in claim 1 , wherein said conductive protrusions comprise spherical surfaces.
3 . The microelectronic assembly as claimed in claim 1 , wherein said conductive protrusions comprise solder balls.
4 . The microelectronic assembly as claimed in claim 1 , wherein said conductive protrusions comprise bumps of bonding material.
5 . The microelectronic assembly as claimed in claim 3 , wherein said conductive protrusions comprise a solder selected from the group consisting of high lead solder, C4 solder and eutectic solder.
6 . The microelectronic assembly as claimed in claim 1 , wherein said conductive protrusions project a distance of about 10-50 μm above said top surface of said dielectric layer.
7 . The microelectronic assembly as claimed in claim 1 , wherein said conductive protrusions comprise a material selected from the group consisting of metal and conductive polymers.
8 . The microelectronic assembly as claimed in claim 1 , wherein said first microelectronic element is selected from the group consisting of a semiconductor chip, a wafer incorporating a plurality of semiconductor chips, a circuit board and a microelectronic element comprising silicon.
9 . The microelectronic assembly as claimed in claim 1 , wherein said dielectric layer comprises an epoxy.
10 . The microelectronic assembly as claimed in claim 1 , wherein said dielectric layer has a low coefficient of thermal expansion.
11 . The microelectronic assembly as claimed in claim 1 , wherein said conductive protrusions project from said dielectric layer a distance of about 50 μm or less.
12 . A microelectronic assembly comprising:
a first microelectronic element having a first surface and contacts accessible at said first surface; a second microelectronic element having a first surface with conductive elements opposing said contacts accessible at said first surface of said first microelectronic element; conductive protrusions electrically interconnecting said contacts of said first microelectronic element with said conductive elements of said second microelectronic element; a layer of a dielectric material covering said first surface of said first microelectronic element are partially surrounding said conductive protrusions, wherein said dielectric layer is in contact with said first surface of said first microelectronic element and is spaced from said first surface of said second microelectronic element.
13 . The microelectronic assembly as claimed in claim 12 , wherein said conductive protrusions are accessible at an exterior surface of said dielectric layer.
14 . The microelectronic assembly as claimed in claim 13 , wherein said conductive protrusions project beyond said exterior surface of said dielectric layer.
15 . The microelectronic assembly as claimed in claim 14 , wherein said conductive protrusions project from said exterior surface of said dielectric layer a distance of about 50 μm or less.
16 . A method of making a microelectronic assembly comprising:
providing a microelectronic element having a first major surface, conductive protrusions projecting from said first major surface and a layer of a dielectric material covering said first major surface, wherein said conductive protrusions are accessible at a top surface of said dielectric layer; while said conductive protrusions are accessible, assembling said microelectronic element with a microelectronic component.
17 . The method as claimed in claim 16 , wherein the providing step comprises:
covering said first major surface and said conductive protrusions with said dielectric layer; removing a portion of said dielectric layer so that portions of said conductive protrusions are accessible; and after the removing step and while said conductive protrusions are accessible, assembling said microelectronic element with said microelectronic component.
18 . The method as claimed in claim 17 , wherein the covering step comprises:
applying said dielectric material to said first major surface as a flowable, curable material; and curing said dielectric material.
19 . The method as claimed in claim 17 , wherein the removing step comprises removing a portion of said dielectric layer by grinding.
20 . The method as claimed in claim 17 , wherein the removing step comprises removing a portion of said dielectric layer by etching.Join the waitlist — get patent alerts
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