Integrated inductor structure and method of fabrication

Abstract

An inductor structure comprised of a magnetic section and a single turn solenoid The single turn solenoid to contain within a portion of the magnetic section and circumscribed by the magnetic section.

1 . A method of forming an inductor structure comprising: 
 forming an open conductive loop; and    forming a magnetic material contained within said open conductive loop and to encompass said open conductive loop.    
   
   
       2 . A method of forming an inductor structure of  claim 1  used to form an inductor in a build-up packaging layer of an integrated circuit package.  
   
   
       3 . A method of forming an inductor structure of  claim 1  coupled to an integrated device.  
   
   
       4 . A method of forming an inductor comprising: 
 forming a magnetic layer; and    forming a single turn solenoid to contain within a portion of said magnetic layer and circumscribed by said magnetic layer.    
   
   
       5 . The method of  claim 4  wherein said magnetic layer consists of CoFHfO.  
   
   
       6 . The method of  claim 4  wherein said single turn solenoid consists of copper.  
   
   
       7 . The method of  claim 6  used to form an inductor in a build-up packaging layer of an integrated circuit package.  
   
   
       8 . The method of  claim 4  wherein the magnetic layer is formed by a laminating technique.  
   
   
       9 . A method of forming an inductor comprising: 
 forming a metal layer;    shaping said metal layer to form a bowl shape; and    forming a magnetic layer onto and around said metal layer.    
   
   
       10 . The method of  claim 9  wherein said metal layer consists of copper.  
   
   
       11 . The method of  claim 9  wherein said magnetic layer is formed by a sputtering technique.  
   
   
       12 . The method of  claim 9  wherein said magnetic layer has a permeability of about 300.  
   
   
       13 . The method of  claim 12  used to form an inductor in a build-up packaging layer of an integrated circuit package and coupled to an integrated device.  
   
   
       14 . A method of forming an inductor structure comprising: 
 forming a first conductive layer;    forming a magnetic layer over said first conductive layer;    forming a first conductive sidewall and a second conductive sidewall through said magnetic layer and adjoined to said first conductive layer;    forming a first conductive portion adjoined to said first conductive sidewall, said first conductive portion formed opposite said magnetic layer from said first conductive layer; and    forming a second conductive portion adjoined to said second conductive sidewall, said second portion formed opposite said magnetic layer from said first conductive layer.    
   
   
       15 . The method of forming an inductor structure of  claim 14  further comprising planarizing said magnetic layer.  
   
   
       16 . The method of forming an inductor structure of  claim 14  wherein the first conductive layer is formed by an electroplating technique.  
   
   
       17 . The method of forming an inductor structure of  claim 14  wherein said first conductive sidewall and said second conductive sidewall are formed by vias.  
   
   
       18 . A method of forming an inductor on a package substrate, said method comprising: 
 forming a first seed layer on the package substrate;    electroplating a first conductive layer on said substrate;    depositing a layer having magnetic properties over said first conductive layer;    laser drilling a via array in said layer having magnetic properties to form opposite first and second sidewalls coupled to said first conductive layer;    forming a second seed layer on said via array and said layer having magnetic properties;    forming a dry film resist over said second seed layer;    creating openings in said dry film resist in predetermined locations;    electroplating a second conductive layer in said openings; and    removing said dry film resist and said second seed layer.    
   
   
       19 . The method of  claim 18  used to form an inductor coupled to an integrated circuit die and a voltage regulator module.  
   
   
       20 . The method of  claim 19 , wherein said layer having magnetic properties is a magneto-dielectric material with a relative permeability of approximately 300.  
   
   
       21 . A method of forming an inductor structure into an array comprising: 
 forming a plurality of magnetic sections; and    forming a plurality of single turn solenoids, each one of said plurality of single turn solenoids to contain within a portion of one of said plurality of said magnetic sections and circumscribed by one of said plurality of magnetic sections.    
   
   
       22 . The method of forming an inductor structure into an array of  claim 21  further including the step of forming a dielectric material between said plurality of magnetic sections.  
   
   
       23 . The method of forming an inductor structure into an array of  claim 22  wherein said dielectric material is selected from a group consisting of an Ajinomoto buildup film (ABF), a ceramic, and a solder resist.  
   
   
       24 . The method of forming an inductor structure into an array of  claim 23  wherein said plurality of magnetic sections is formed from a magneto-dielectric.  
   
   
       25 . The method of forming an inductor structure into an array of  claim 21  used to form an inductor array used in conjunction with a voltage regulator module array.  
   
   
       26 . A method of forming an inductor structure included in an inductor array comprising: 
 forming a plurality of first conductive layers;    forming a plurality of magnetic sections over said plurality of first conductive layers;    forming a plurality of first conductive sidewalls and a plurality of second conductive sidewalls through said magnetic sections, each one of said plurality of first and second conductive sidewalls adjoined to one of said plurality of first conductive layers;    forming a plurality of first conductive portions, each one of said plurality of first conductive portions adjoined to one of said plurality of first conductive sidewalls, each one of said plurality of first conductive portions formed opposite one of said plurality of magnetic sections from one of said plurality of first conductive layers; and    forming a plurality of second conductive portions, each one of said plurality of second conductive portions adjoined to one of said plurality of second conductive sidewalls, each one of said plurality of second conductive portions formed opposite one of said plurality of magnetic sections from one of said plurality of first conductive layers.    
   
   
       27 . The method of  claim 26  further including the step of forming a dielectric material between each of said plurality of magnetic sections and over said plurality of first and second conductive portions.  
   
   
       28 . The method of  claim 27  used to fabricate an inductor array between a voltage regulator module array and an integrated circuit die.  
   
   
       29 . The method of  claim 27  wherein said dielectric material is a solder resist.  
   
   
       30 . The method of  claim 29  further comprising forming openings in said dielectric material to expose a portion of said plurality of first and second conductive portions and filling said openings with conductive material.  
   
   
       31 . The method of  claim 30  wherein said openings are filled by electrolytic plating.  
   
   
       32 . The method of  claim 26  wherein said plurality of first conductive sidewalls and said plurality of second conductive sidewalls are formed by vias.  
   
   
       33 . The method of  claim 27  wherein said plurality of magnetic sections have a relative permeability about 300.