Semiconductor device and a method of manufacturing the same

Abstract

In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P 1 ) for leading out electrodes on a source region 10 , a drain region 9 and leach-through layers 3 ( 4 ), to which a first layer wirings 11 a, 11 d (M 1 ) are connected and, further, backing second layer wirings 12 a to 12 d are connected on the conductor plugs 13 (P 1 ) to the first layer wirings 11 s, 11 d (M 1 ).

1 . A semiconductor device having a plurality of MISFETs formed on a main surface of a semiconductor substrate, each MISFET comprising: 
 a drain region and a source region formed on the semiconductor substrate;    a channel-forming region between the source region and the drain region;    a gate insulation film formed over the channel-forming region;    a gate electrode formed over the gate insulation film;    a drain offset region formed between the gate electrode and drain region;    a well region formed under the channel-forming region and source region;    a first insulation film formed over the plurality of MISFETs; and    a first wiring formed over the first insulation film, which is electrically connected with the source region;    a second wiring formed over the first insulation film, which is electrically connected with the drain region,    wherein a first film thickness of the gate insulation film directly under an edge of the gate electrode is greater than a second film thickness of the gate insulation film directly under a center of the gate electrode.    
   
   
       2 . A semiconductor device according to  claim 1 , wherein each MISFET of the plurality of MISFETs constitutes a unit block of the power amplifier circuit.  
   
   
       3 . A semiconductor device according to  claim 2 , wherein the gate electrodes, source regions and drain regions of the unit blocks are electrically connected, respectively.  
   
   
       4 . A semiconductor device according to  claim 3 , wherein each unit block has a gate pad and a drain pad; and 
 the gate pad and the drain pad are electrically connected with the gate electrode and the drain region, respectively.    
   
   
       5 . A semiconductor device according to  claim 1 , wherein a source electrode is formed on a back surface of the semiconductor substrate; and 
 the source region and source electrode are electrically connected.    
   
   
       6 . A semiconductor device according to  claim 1 , wherein the semiconductor device constitutes a power amplifier circuit employed in a mobile communication apparatus.