MOS transistor

Abstract

A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the halo implanted region, for obtaining a good junction profile and improving short channel effect. The implant comprises carbon, a hydrocarbon, or a derivative of the hydrocarbon, such as one selected from a group consisting of C, C x H y +, and (C x H y ) n +, wherein x is a number of 1 to 10, y is a number of 4 to 20, and n is a number of 1 to 1000.

1 . A MOS transistor, comprising: 
 a substrate having a gate thereon, a source region and a drain region therein with a channel region under the gate therebetween;    at least a spacer disposed on a side wall of the gate;    a light doped source region and a light doped drain region disposed in the source region and the drain region; and    a source and a drain disposed respectively in the source region and the drain region at a side of the light doped source region and a side the light doped drain region;    wherein one of the light doped source region, the light doped drain region, the source region, and the drain region comprises an implant comprising carbon, a hydrocarbon compound, or a derivative of the hydrocarbon compound.    
   
   
       2 . The MOS transistor as claimed in  claim 1 , further comprising a halo implanted region formed between the channel region and the source region and between the channel region and the drain region.  
   
   
       3 . The MOS transistor as claimed in  claim 1 , wherein the implant comprises one selected from the group consisting of C, C x H y +, and (C x H y ) n +, wherein x is a number of 1 to 10, y is a number of 4 to 20, and n is a number of 1 to 1000.  
   
   
       4 . The MOS transistor as claimed in  claim 1 , wherein the implant comprises C and the light doped source region and the light doped drain region comprise As or P.  
   
   
       5 . The MOS transistor as claimed in  claim 1 , wherein the implant comprises C and the light doped source region and the light doped drain region comprise B or BF 2 .  
   
   
       6 . The MOS transistor as claimed in  claim 1 , wherein the implant comprises C x H y + or (C x H y ) n + and the light doped source region and the light doped drain region comprise B, BF 2 , B w H z +, or (B w H z ) m +, wherein w is a number of 2 to 30, z is a number of 2 to 40, and m is a number of 10 to 1000.  
   
   
       7 . A MOS transistor, comprising: 
 a substrate having a gate thereon, a source region and a drain region therein with a channel region under the gate therebetween;    at least a spacer disposed on a side wall of the gate;    a light doped source region and a light doped drain region disposed in the source region and the drain region;    a source and a drain disposed respectively in the source region and the drain region at a side of the light doped source region and a side the light doped drain region; and    a halo implanted region formed between the channel region and the source region and between the channel region and the drain region, wherein the halo implanted region comprises an implant comprising carbon, a hydrocarbon compound, or a derivative of the hydrocarbon compound.    
   
   
       8 . The MOS transistor as claimed in  claim 7 , wherein the implant comprises one selected from the group consisting of C, C x H y +, and (C x H y ) n +, wherein x is a number of 1 to 10, y is a number of 4 to 20, and n is a number of 1 to 1000.  
   
   
       9 . The MOS transistor as claimed in  claim 7 , wherein the light doped source region and the light doped drain region comprise B, BF 2 , B w H z +, or (B w H z ) m +, wherein w is a number of 2 to 30, z is a number of 2 to 40, and m is a number of 10 to 1000.